Who’s Christophe Bobda

January 1st, 2022

Christophe Bobda


University of Florida



Personal webpage


Research interests

Reconfigurable Computing, FPGA, System on Chip Design, Embedded Imaging, Cybersecurity and Robotics

Short bio

Professor Bobda received the License in mathematics from the University of Yaounde, Cameroon, in 1992, the diploma of computer science and the Ph.D. degree in computer science from the University of Paderborn in Germany in 1999 and 2003 respectively. In June 2003 he joined the department of computer science at the University of Erlangen-Nuremberg in Germany as Post doc. Dr. Bobda received the best dissertation award 2003 from the University of Paderborn for his work on synthesis of reconfigurable systems using temporal partitioning and temporal placement. In 2005 Dr. Bobda was appointed assistant professor at the University of Kaiserslautern. There he set the chair for Self-Organizing Embedded Systems that he led until October 2007. From 2007 to 2010 Dr. Bobda was Professor at the University of Potsdam and leader of the working Group Computer Engineering. Upon moving to the US, Dr. Bobda was appointed Professor of computer engineering at the University of Arkansas where he founded the smart embedded systems lab (2010 – 2018). Since 2019, Dr. Boda has been with the University of Florida as Professor of Computer Engineering, leader of the lab smart systems and outreach director of the the Nelms Institute of Connected World.

Reasearch highlights

Professor Christophe Bobda’ research interests lie primarily in the design of smart embedded systems, with emphasis of run-time optimization. He investigates the design and run-time operation of high-performance and adaptive architectures with application in image processing, embedded optimization, security, and control. He recently introduced an event-based split-CNN architecture (ESCA) for running time-critical vision applications with comparatively less memory footprint while consuming low power. ESCA has a dedicated hardware architecture and scheduling of on-chip memory buffering using a split-CNN that reduces memory requirements by splitting the feature maps into small patches and independently executes them. This work received the best short paper of award at FCCM2021. His previous work of “DyNoC: A Dynamic Infrastructure for Communication in Dynamically Reconfigurable Devices” is nominated among the 23 most significant FPL papers of the last 25 years. His research enables a new paradigm to design adaptive architectures for various applications.