ACM/IEEE A. Richard Newton Technical Impact Award in Electronic Design Automation
Presented by the ACM Special Interest Group on Design Automation and the IEEE Council on Electronic Design Automation
Description: To honor a person or persons for an outstanding technical contribution within the scope of electronic design automation, as evidenced by a paper published at least ten years before the presentation of the award. The award is based on the impact of the contribution.
Background: The IEEE Council on Electronic Design Automation sponsors or co-sponsors the Donald Pederson Award for best paper in IEEE Transactions on Computer-Aided Design, the William McCalla Award for best paper at the International Conference on Computer-Aided Design, and the Phil Kaufman Award for Distinguished Contributions to Electronic Design Automation (with the EDA Consortium). The Kaufmann Award is the major award normally given to a senior person in the field for distinguished contributions. The other IEEE CEDA awards recognize outstanding publications. The ACM Special Interest Group on Design Automation sponsors or co-sponsors the ACM Transactions on Design Automation of Electronic Systems Best Paper Award, the William McCalla Award for best paper at the International Conference on Computer-Aided Design, and two awards for outstanding graduate students and new faculty. The ACM Outstanding Ph.D. Dissertation Award is given each year to a graduating Ph.D. student in recognition of his/her thesis contributions to advancement in the EDA field. The SIGDA Outstanding New Faculty Award is also given each year to a junior faculty whose research contributions are likely to make a significant impact.
The proposed A. Richard Newton Technical Impact Award complements these awards and is intended for contributors whose impact is recognized over a significant period of time.
The Award honors A. Richard Newton, a luminary in the design automation area in academia and industry, faculty contributor and advisor to many of the leaders in the field, company founder, and dean of engineering at the University of California, Berkeley, who died in 2007. Professor Newton embodied the idea of technical impact which this award seeks to recognize.
Nominee Solicitation: The call for nominees will be published each fall by email to members of participating societies, by flyers and publicity at the International Conference on Computer-Aided Design, and on the web sites of the IEEE Council on Electronic Design Automation (and its participating societies) and the web site of ACM’s Special Interest Group on Design Automation, in the SIGDA and CEDA newsletters, and in IEEE Design & Test magazine.
The nomination form will ask for (i) the paper and authors to be honored, (ii) a proposed citation, (iii) a description of the impact of the paper over at least a ten-year period, including evidence in support of the significant intellectual contributions and high impact in the field of the nominated paper. At minimum, supporting material should cover these aspects of impact:
- impact on the research community reflected in citations
- impact on the practitioner community via evidence of usage of the described technology in an industrial setting
- impact on the EDA community as a whole via evidence of starting new directions and spawning new ideas
In addition to the evidence of impact, the nomination form will include biographical information (including education and employment), professional activities, publications, and recognition. Three endorsements attesting to the impact of the work may be included.
The nomination materials should be emailed by the deadline to SIGDA-Award@acm.org (Subject: ACM/IEEE A. Richard Newton Technical Impact Award in Electronic Design Automation).
Award Committee: Selection will be made by a committee comprised of three members designated by the IEEE Council on Electronic Design Automation and three members designated by the ACM Special Interest Group in Design Automation. The Committee will meet in February of each year to review nominations and make a recommendation to the sponsoring Council and SIG by March 15. Following approval by the sponsors, the committee will contact the recipient to ensure that the award will be accepted.
All standard conflict of interest regulations as stated in ACM policy will be applied (see https://awards.acm.org/conflict-of-interest). Any awards committee members will recuse themselves from consideration of any candidates where a conflict of interest may exist.
Schedule: The call for nominees will be published annually in the fall, especially at the International Conference on Computer-Aided Design (see above). Submission deadline is Feb 1 of each year. The Awards Committee will meet in February to determine the winning paper and award recipient(s). The sponsors will approve the selection by March 15. The recipient will be notified by April 1. The award will be presented in June/July at the ACM/IEEE Design Automation Conference.
Selection/Basis for Judging: This award honors an individual or a group which has made an outstanding technical contribution in the scope of electronic design automation through a paper published at least ten years before the award is presented. The award is based on the impact of the paper as indicated above. Nominees from universities, industry, and government worldwide will be considered and encouraged. The award is not a best paper or initial original contribution award. Instead, the prime consideration will be the impact on technology, industry, and education, and on working electronic designers and engineers. Such impact might include a research result that is widely cited or spawned much innovative thinking, or a new technique that has been put into wide use in practice.
Presentation: The award includes a cash prize of $1500 to be split amoung the awardees. The award will be formally presented annually at the ACM/IEEE Design Automation Conference.
Publicity: Press release to industry press, articles in IEEE and ACM publications, and publicity at conferences sponsored by the CEDA, SIGDA, ACM, and IEEE.
- 2021: John A. Waicukauski, Eric Lindbloom, Barry K. Rosen, and Vijay S. Iyengar, “Transition Fault Simulation,” IEEE Design & Test of Computers, Vol. 4, no. 2, April 1987
- 2020: Luca Benini and Giovanni De Micheli, “Networks on Chips: A New SoC Paradigm,” IEEE Computer, pp. 70-78, January 2002.
- 2019: E. B. Eichelberger and T. W. Williams, “A Logic Design Structure for LSI Testability,” In Proc. of the 14th Design Automation Conference, 1977.
- 2018: Hans Eisenmann and Frank M. Johannes, “Generic Global Placement and Floorplanning,” In Proc. of the 35th Design Automation Conference, 1998.
- 2017: Matthew W. Moskewicz, Conor F. Madigan, Ying Zhao, Lintao Zhang, and Sharad Malik, “Chaff: Engineering an Efficient SAT Solver,” In Proc. of the 38st Design Automation Conference, 2001.
- 2016: Chandu Visweswariah, Kaushik Ravindran, Kerim Kalafala, Steven G. Walker, Sambasivan Narayan, “First-Order Incremental Block-Based Statistical Timing Analysis,” In Proc. of the 41st Design Automation Conference, 2004.
- 2015: Blaise Gassend, Dwaine Clarke, Marten van Dijk, and Srinivas Devadas, “Silicon Physical Random Functions,” In Proceedings of the 9th ACM Conference on Computer and Communications Security (CCS), 2002.
- 2014: Subhasish Mitra and Kee Sup Kim, “X-compact: an efficient response compaction technique for test cost reduction,” IEEE International Test Conference, 2002.
- 2013: Keith Nabors and Jacob White, “FastCap: A multipole accelerated 3-D capacitance extraction program,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 10, Issue 11 (1991): 1447-1459.
- 2012: Altan Odabasioglu, Mustafa Celik, Larry Pileggi, “PRIMA: Passive Reduced-Order Interconnect Macromodeling Algorithm,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Aug., 1998.
- 2011: Jason Cong, Eugene Ding, “FlowMap: An Optimal Technology Mapping Algorithm for Delay Optimization in Lookup-Table Based FPGA Designs,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Jan., 1994.
- 2010: Randal Bryant, “Graph-based algorithms for Boolean function manipulation” IEEE Transactions on Computers, Aug., 1986.
- 2009: Robert K. Brayton, Richard Rudell, Alberto Sangiovanni-Vincentelli, Albert R. Wang, “MIS: A Multiple-Level Logic Optimizations System,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Nov., 1997.