Newton

18 June 2019
Yibo Lin
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Categories: Awards

ACM/IEEE A. Richard Newton Technical Impact Award in Electronic Design Automation 2025

Call for Nominations

Description

To honor a person or persons for an outstanding technical contribution within the scope of electronic design automation, as evidenced by a paper published at least ten years before the presentation of the award (before July 2015).

Prize

USD 1500 to be shared amongst the authors and a plaque for each author.

Funding

Funded by the IEEE Council on Electronic Design Automation and ACM Special Interest Group on Design Automation.

Presentation

Presented annually at the Design Automation Conference.

Historical Background

A. Richard Newton, one of the foremost pioneers and leaders of the EDA field, passed away on 2 January 2007, of pancreatic cancer at the age of 55.

A. Richard Newton was professor and dean of the College of Engineering at the University of California, Berkeley. Newton was educated at the University of Melbourne and received his bachelor’s degree in 1973 and his master’s degree in 1975. In the early 1970s he began to work on SPICE, a simulation program initially developed by Larry Nagel and Donald Pederson to analyze and design complex electronic circuitry with speed and accuracy. In 1978, Newton earned his Ph.D. in electrical engineering and computer sciences from UC Berkeley.

For his research and entrepreneurial contributions to the electronic design automation industry, he was awarded the 2003 Phil Kaufman Award. In 2004, he was named a member of the National Academy of Engineering, and in 2006, of the American Academy of Arts and Sciences. He was a member of the Association for Computing Machinery and a fellow of the Institute of Electrical and Electronics Engineers.

Basis for Judging

The prime consideration will be the impact on technology, industry, and education, and on working designers and engineers in the field of EDA. Such impact might include a research result that inspires much innovative thinking, or that has been put into wide use in practice.

Eligibility

The paper must have passed through a peer-review process before publication, be an archived conference or journal publication available from or published by either ACM or IEEE, and be a seminal paper where an original idea was first described. Follow-up papers and extended descriptions of the work may be cited in the nomination, but the award is given for the initial original contribution.

Selection Committee

Chair: Wanli Chang

Vice-Chair: Deming Chen

Members to be announced

Nomination Deadline

21 March 2025

Nomination Package

Please send a one-page nomination letter explaining the impact of the nominated paper, evidence of the impact, biography of the nominator, at most three endorsements, and the nominated paper itself, all in one PDF file, to sigda.acm@gmail.com (Subject: 2025 A. Richard Newton Technical Impact Award in Electronic Design Automation).
 

Past Awardees

  • 2024: Mircea Stan and Wayne Burleson, “Bus-Invert Coding for Low-Power I/O”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 3, No. 1, pp. 49-58, March 1995.
  • 2023: Moshe Vardi and Pierre Wolper for their research work “An Automata-Theoretic Approach to Automatic Program Verification”, published in the proceedings of the 1st Symposium on Logic in Computer Science, 1986.
  • 2022: Ricardo Telichevesky, Kenneth S. Kundert, and Jacob K. White, “Efficient Steady-State Analysis based on Matrix-Free Krylov-Subspace Methods”, In Proc. of the 32nd Design Automation Conference, 1995.
  • 2021: John A. Waicukauski, Eric Lindbloom, Barry K. Rosen, and Vijay S. Iyengar, “Transition Fault Simulation,” IEEE Design & Test of Computers, Vol. 4, no. 2, April 1987
  • 2020: Luca Benini and Giovanni De Micheli, “Networks on Chips: A New SoC Paradigm,” IEEE Computer, pp. 70-78, January 2002.
  • 2019: E. B. Eichelberger and T. W. Williams, “A Logic Design Structure for LSI Testability,” In Proc. of the 14th Design Automation Conference, 1977.
  • 2018: Hans Eisenmann and Frank M. Johannes, “Generic Global Placement and Floorplanning,” In Proc. of the 35th Design Automation Conference, 1998.
  • 2017: Matthew W. Moskewicz, Conor F. Madigan, Ying Zhao, Lintao Zhang, and Sharad Malik, “Chaff: Engineering an Efficient SAT Solver,” In Proc. of the 38st Design Automation Conference, 2001.
  • 2016: Chandu Visweswariah, Kaushik Ravindran, Kerim Kalafala, Steven G. Walker, Sambasivan Narayan, “First-Order Incremental Block-Based Statistical Timing Analysis,” In Proc. of the 41st Design Automation Conference, 2004.
  • 2015: Blaise Gassend, Dwaine Clarke, Marten van Dijk, and Srinivas Devadas, “Silicon Physical Random Functions,” In Proceedings of the 9th ACM Conference on Computer and Communications Security (CCS), 2002.
  • 2014: Subhasish Mitra and Kee Sup Kim, “X-compact: an efficient response compaction technique for test cost reduction,” IEEE International Test Conference, 2002.
  • 2013: Keith Nabors and Jacob White, “FastCap: A multipole accelerated 3-D capacitance extraction program,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 10, Issue 11 (1991): 1447-1459.
  • 2012: Altan Odabasioglu, Mustafa Celik, Larry Pileggi, “PRIMA: Passive Reduced-Order Interconnect Macromodeling Algorithm,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Aug., 1998.
  • 2011: Jason Cong, Eugene Ding, “FlowMap: An Optimal Technology Mapping Algorithm for Delay Optimization in Lookup-Table Based FPGA Designs,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Jan., 1994.
  • 2010: Randal Bryant, “Graph-based algorithms for Boolean function manipulation” IEEE Transactions on Computers, Aug., 1986.
  • 2009: Robert K. Brayton, Richard Rudell, Alberto Sangiovanni-Vincentelli, Albert R. Wang, “MIS: A Multiple-Level Logic Optimizations System,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Nov., 1997.