Who’s Can Li

April 1st, 2022

Can Li

Assistant Professor

The University of Hong Kong



Personal webpage


Research interests

Neuromorphic computing, nanoelectronics devices, non-volatile memories, software-hardware co-optimization

Short bio

Dr. Can Li is currently an Assistant Professor at the Department of Electrical and Electronic Engineering of the University of Hong Kong, working on analog and neuromorphic computing accelerators based on post-CMOS emerging devices (e.g. memristors), for efficient machine/deep learning, network security, signal processing, etc. Before that, He spent two years at Hewlett Packard Labs in Palo Alto, California, and obtained his Ph.D. from University of Massachusetts, Amherst, and B.S./M.S. from Peking University. He is a recipient of the Early Career Award by HKSAR RGC and the Excellent Young Scientist Fund Award by NSFC.

Reasearch highlights

Can Li has made contributions to the in-memory computing technology based on non-volatile memory devices. At the device level, he fabricated and characterized different resistive switching or memristive devices with different material stacks, including Cu/SiOx/Pt, Pt/SiOx/Pt, Si/SiOx/Si, Ta/HfOx/Pt, etc. The potential of this type of device was also demonstrated by Can Li and colleagues’ work on three-dimensional (3D) stacking and integration (up to eight layers), and ultimate scaling down to 2 nm×2 nm. At the array level, he integrated memristors (2 µm×2 µm and 50 nm×50 nm) with silicon transistors from commercial foundries and demonstrated high-yield and good analog programming ability. At the circuit level, he designed and developed analog circuits for analog content addressable memory in a 6-transistor 2-memristor (6T2M) configuration. Can Li was closely involved in designing, taping out, and evaluating peripheral circuits for matrix multiplication accelerators. At the systems level, he showcased the memristor-based system in potential applications such as artificial intelligence, analog signal/image processing, pattern matching, solving optimization problems, hardware security, etc. Those studies have been documented in many high-profile publications, including Nature Electronics, Nature Machine Intelligence, Nature Nanotechnology, Nature Communications, Advanced Materials, IEDM, etc.

Who’s Johann Knechtel

April 1st, 2022

Johann Knechtel

Research Scientist

New York University Abu Dhabi, UAE



Personal webpage


Research interests

Hardware Security, Electronic Design Automation (EDA), 3D Integration, Emerging Technologies, Machine Learning

Short bio

Dr.-Ing. Johann Knechtel is a Research Scientist with the Design for Excellence Lab at New York University (NYU) Abu Dhabi, UAE. In this position, he is acting as Co-PI for multiple research projects and provides lecturing, training, and mentoring to PhD and undergraduate students. Johann received the Dipl.-Ing. degree (M.Sc.) in Information Systems Engineering in 2010 and the Dr.-Ing. degree (Ph.D.) in Computer Engineering (summa cum lauda, with highest honors) in 2014, both from TU Dresden (TUD), Germany. Before joining NYU Abu Dhabi in 2016, Johann was a Postdoctoral Researcher in 2015 at the Masdar Institute of Science and Technology, UAE, where he was affiliated with the Twinlab on “3D Stacked Chips”, hosted by Masdar Institute and TUD and supported by industry and government partners. In 2012 he was with the Chinese University of Hong Kong, China, and in 2010 he was with the University of Michigan, USA. In 2006, he was working as Freelance Software Engineer for Siemens IT Solutions and Services, Germany; in 2006–08 he was working as Research Assistant for Fraunhofer IWS Institute, Dresden, Germany; and in 2008–09 he was working as Embedded Systems Intern for TraceTronic GmbH, Dresden, Germany. In 2017, Johann and his team achieved the 1st place in the CSAW Applied Research Competition. Johann obtained scholarships from the German Academic Exchange Service (DAAD) in 2010, from the German Research Foundation (DFG) in 2010–14, and from the Graduate Academy of TU Dresden in 2014. Johann obtained an NYU Research Enhancement Fund in 2018–21. Johann has (co-)authored around 60 publications, including 15 highlighted and/or invited papers. Johann is an active member of the ACM, including ACM SIGDA, and IEEE. He is serving as peer reviewer for various top-tier ACM and IEEE conferences and journals.

Reasearch highlights

Johann is acting as Co-PI for multiple projects with the common goal of advancing hardware security. Johann’s work involves five PhD students and postdoctoral researchers at NYU Abu Dhabi and also covers collaborations with around 15 researchers and students at prestigious institutions worldwide. Johann’s work is currently focused on the following themes: 1. Security closure for physical design of integrated circuits (ICs); 2. Protection of IC design intellectual property, with advanced techniques proposed for split manufacturing and obfuscation utilizing interconnect fabrics as well as 2.5D and 3D integration; 3. Secure architectures and secure system integration based on chiplets and 2.5D integration; 4. Machine learning-driven security evaluation at design time of defense schemes like split manufacturing and logic locking; 5. Security evaluation of ICs and field-programmable gate arrays (FPGAs) using advanced electro-magnetic field and laser-assisted optical probing; 6. Design-time security evaluation of ICs against side-channel attacks; 7. Security promises and challenges of emerging technologies for various defense schemes; 8. Security-aware electronic design automation (EDA) flows for 2D, 2.5D, and 3D ICs. Johann has successfully published on these and other themes. Recent examples include two invited papers at ICCAD 2021 on security closure for physical design, two invited papers at ISPD 2020–21 on hardware security for and beyond CMOS devices, an invited paper at DATE 2020 on the role of EDA for secure composition of ICs, and invited papers at IOLTS and COINS 2019 on 3D integration as another dimension toward hardware security and on design IP protection, respectively. Furthermore, Johann and colleagues have recently compiled a book “The Next Era in Hardware Security: A Perspective on Emerging Technologies for Secure Electronics,” Springer, 2022, with already 1.7k full-text downloads as of today. Currently, Johann is acting as lead organizer for the first-ever international competition (co-hosted with ISPD 2022) on security closure. For that, research teams from all over the world are hardening the physical layouts of ICs at design time against selected attacks that are executed post-design time. This notion of security closure is quite complex, and besides the interest from the community with this contest and invited papers, Johann and colleagues are also in active discussion with government agencies on that challenge. Earlier, Johann and colleagues from TU Dresden, Germany, Google Inc., and Masdar Institute published a survey paper “Large-Scale 3D Chips: Challenges and Solutions for Design Automation, Testing, and Trustworthy Integration” in IPSJ Transactions on System LSI Design Methodology. Since its time of appearance in 2017, i.e., for five years already, this paper is constantly the most viewed article of that journal. In 2012, Johann published his first journal article in IEEE TCAD with colleagues from Michigan University, USA; at the time of appearance, this paper was the most popular article across all of that journal.

ACM SIGDA Speaker Travel Grant Program

The SIGDA Speaker Series Travel Grant actively supports the travels of the speakers who are invited to give lectures or talks in local events, universities, and companies, so as to disseminate the values and impact of SIGDA. These speakers can be from either academia or company and are considered as good lectures that can help reach out to the audiences in the broad field of design automation. Once the application is approved, SIGDA will issue partial grants to cover the speaker’s travel expenses, including travel and subsistence costs.

This grant is to help on promoting the EDA community and activities all over the world. It will provide travel support averaging $1,000 (USD) for approximately 6 eligible speakers per year to defray their costs of giving lectures or talks in local events, universities, and companies. Priority will be given to the applicants from the local sections of SIGDA with the speakers presenting in the events supported by the local sections of SIGDA. In addition, local EDA communities or individuals, rather than local sections of SIGDA, are also encouraged to apply for this grant. For the application or additional information, please contact SIGDA by sending an email exclusively to the Technical Activity Chair (https://www.sigda.org/about-us/officers/).

Review Process

The review committee will be formed by the current Technical Activity Chair and Education Chair of SIGDA. The reviews will be reported and discussed in SIGDA’s executive committee meeting. After the discussion, the executing committee members will vote to grant or not grant the submitted applications.

Selection Criteria

The review takes the applicants/events and speakers in considerations.

  • Preference is given to the local sections of SIGDA for the speakers invited to the events, universities, and companies supported by the local sections of SIGDA. In addition, the applicants from local EDA communities or individuals are also considered.
  • The invited speaker should be a good lecture or researcher from either academia or industry, and has a good track record in the broad field of design automation.

Post Applications – Report and Reimbursement

  • For the speaker giving a talk in an ACM event, SIGDA can support the travel grant and process reimbursements to the speaker directly. At the end of the event, the speaker needs to complete the ACM reimbursement form and send it to SIGDA or ACM Representative along with copies of the receipts. The speakers will also need to abide by the reimbursement policies/standards found here: https://www.acm.org/special-interest-groups/volunteer-resources/conference-planning/conference-finances#speaker
  • For the speaker giving a talk in a non-ACM event, SIGDA will provide the lump sum payment to the legal and financial sponsoring organization, which would offer the fund as the travel grants and process reimbursements. Meanwhile, the sponsoring organization needs to indicate on the event’s promotional materials that travel grants are being supported by SIGDA. At the end of the event, the sponsoring organization needs to provide (1) a one-page final report to SIGDA reflecting the success of their goals against the funds provided and indicating how the funds were spent, (2) an invoice for the approved amount, and (3) tax form. Note that there is no specific format for the final report.

Application Form