Links go to individual research groups; a summary of demo information is also available.

Monday June 18th

Time	Station1 Sun Solaris	Station2 Sun Solaris	Station3 Sun Solaris	Station4 Pentium Win NT Linux	Station5 Pentium Win NT Linux	Station6 Pentium Win NT Linux
10-11	University of California, San Diego Mixed-Signal Test Professor Alex Orailoglu Sule Ozev	Norwegian University of Science and Technology STOREQ CAD tool Einar J. Aas Per Gunnar Kjeldsberg	University of California, Irvine Component Based Design Framework Rajesh Gupta Frederic Doucet Masato Otsuka	Federal University of S. Catarina Advanced Compact MOSFET model Carlos Galup Montoro Rafael Matos Coitinho Luis Henrique Spiller	UCLA Dragon Majid Sarrafzadeh Xiaojian Yang Ryan Kastner	Seoul Nat'l Univ. Emulation-based Verification Kiyoung Choi Jong-Eun Lee Youngchul Cho
11-12	Darmstadt University of Technology Java-based Design Manfred Glesner Leandro Soares Indrusiak Alberto Garcia Ortiz	Universidad Nacional de Ingenieria Fast Prototyping Rodolfo Moreno Luis Enrique Cordova Sosa Daniel Arturo Bejarano	National Tsing Hua University Internet-based simulation Youn-Long Lin Hung-Ping, Wen	University of Michigan Satisfiability Solver Prof. Karem A. Sakallah Fadi Aloul Maher Mneimneh	University of Southern California Apollo: Adaptive Power Optimization Massoud Pedram Jian-Lin Liang Dantu Karthik	University of Maryland at Baltimore County Delay Faults Detection Jim Plusquellic Chintan Patel
12-1	University of Michigan Two Dimensional Position Detection Khalil Najafi Gijoon Nam Hanseup Kim	KULeuven RF Mixer Circuits Georges Gielen Peter Vancorenland	University of Wisconsin-Madison WebHenry Professor Lei He Joe Basile Jun Chen	University of Michigan Wavelet-based video compression Richard B. Brown Li Ding Yi Li	Univeristy of Maryland at Baltimore County 3G SOC Design and Test Dr. Jim Plusquellic Sanat Kamal Bahl	University of California, Irvine EXPRESSION Prof. Nikil Dutt S. Ashok Halambi Peter Grun
1-2	Universitaet Hannover, Germany Programmable Parallel Multimedia-DSP Prof. Peter Pirsch Willm Hinrichs -	UFRGS-Universidade Federal do Rio Grande do Sul Path Search Ricardo Reis Renato Hentschke Sandro Sawicki	University of Wisconsin - Madison Lsim/p: power simulation Lei He Fei Li Weiping Liao	University of Wisconsin-Madison SINO/SPR: RLC net synthesis Lei He Kevin Lepak James D. Z. Ma	SUNY Binghamton The Feng Shui Physical Design Tools Patrick H. Madden Mehmet Can YILDIZ Ryon M. Smey	UC Berkeley Ptolemy II Edward Lee Stephen Neuendorffer
2-3	UCLA PLAmap and RASP_SYN, Technology Mapping Packages Jason Cong Micahel (Gang) Chen Deming Chen	UCLA TRIO/IPEM Jason Cong Ashok Jagannathan Yan Zhang	University of California, Irvine IMPACCT Pai H. Chou Jinfeng Liu Dexin Li	University of Pittsburgh Chatoyant modeling system Steven P. Levitan Timothy P. Kurzweg Jose A. Martinez	Pontificia Bolivariana (UPB) Video acquisition chip Andres Upegui Alejandra Gallón Juan Carlos Velez
3-4	Politecnico di Torino RTL power estimation Enrico Macii Riccardo Scarsi	Univ. of Wisconsin-Madison Fast Circuit Simulator Charlie Chung-Ping Chen Tsung-Hao Chen Yu-Min Lee	University of California, Los Angeles Strategically Programmable System Majid Sarrafzadeh Seda Ogrenci Memik Soheil Ghiasi	University of Tokyo Circuit Transformation Masahiro Fujita Masao Kubo	Carnegie Mellon University TrailBlazer Rob A. Rutenbar Prakash Gopalakrishnan
4-5	NCSU Distributed Networked Design Franc Brglez Hemang Lavana	Chalmers University of Technology (Gothenburg, Sweden) Lava HDL Mary Sheeran Magnus Björk	University of Technology RWTH Aachen Flexible Datapath Generator Tobias G. Noll Volker S. Gierenz Oliver Weiss	University of California, Irvine SPARK: High-Level Synthesis Rajesh K. Gupta Nicolae Savoiu Sumit Gupta	Seoul National University Low-power Software Design Naehyuck Chang Yongsoo Joo Yongseok Choi
5-6	Politechnic Institute of Turin - Italy HW/SW Design reyneri@polito.it Francesco Cucinotta Alessandro Serra	Technical University of Munich WiCkeD 3 Helmut E. Graeb Michael Pronath	TIMA -- Grenoble France SOC Communication Hardware Ahmed Jerraya Gabriela Nicolescu Amer Baghdadi	Carnegie Mellon University SirSim Randal E. Bryant Clayton McDonald	Princeton Univ. Chaff SAT Solver Sharad Malik Matthew Moskewicz Lintao Zhang

Tuesday June 19th

Time	Station1 Sun Solaris	Station2 Sun Solaris	Station3 Sun Solaris	Station4 Pentium Win NT Linux	Station5 Pentium Win NT Linux	Station6 Pentium Win NT Linux
10-11	Darmstadt University of Technology Java-based Design Manfred Glesner Leandro Soares Indrusiak Alberto Garcia Ortiz	University of California, San Diego Mixed-Signal Test Professor Alex Orailoglu Sule Ozev	University of California, Los Angeles Strategically Programmable System Majid Sarrafzadeh Seda Ogrenci Memik Soheil Ghiasi	Federal University of S. Catarina Advanced Compact MOSFET model Carlos Galup Montoro Rafael Matos Coitinho Luis Henrique Spiller	University of California, Irvine SPARK: High-Level Synthesis Rajesh K. Gupta Nicolae Savoiu Sumit Gupta	UCLA Dragon Majid Sarrafzadeh Xiaojian Yang Ryan Kastner
11-12	UCLA PLAmap and RASP_SYN, Technology Mapping Packages Jason Cong Micahel (Gang) Chen Deming Chen	Universidad Nacional de Ingenieria Fast Prototyping Rodolfo Moreno Luis Enrique Cordova Sosa Daniel Arturo Bejarano	National Tsing Hua University Internet-based simulation Youn-Long Lin Hung-Ping, Wen	University of Pittsburgh Chatoyant modeling system Steven P. Levitan Timothy P. Kurzweg Jose A. Martinez	University of Southern California Apollo: Adaptive Power Optimization Massoud Pedram Jian-Lin Liang Dantu Karthik	University of Maryland at Baltimore County Delay Faults Detection Jim Plusquellic Chintan Patel
12-1	University of Michigan Two Dimensional Position Detection Khalil Najafi Gijoon Nam Hanseup Kim	KULeuven RF Mixer Circuits Georges Gielen Peter Vancorenland	University of Wisconsin-Madison WebHenry Professor Lei He Joe Basile Jun Chen	University of Michigan Wavelet-based video compression Richard B. Brown Li Ding Yi Li
1-2	Universitaet Hannover, Germany Programmable Parallel Multimedia-DSP Prof. Peter Pirsch Willm Hinrichs -	UFRGS-Universidade Federal do Rio Grande do Sul Path Search Ricardo Reis Renato Hentschke Sandro Sawicki	University of Wisconsin - Madison Lsim/p: power simulation Lei He Fei Li Weiping Liao			University of Michigan Satisfiability Solver Prof. Karem A. Sakallah Fadi Aloul Maher Mneimneh
2-3	Politecnico di Torino RTL power estimation Enrico Macii Riccardo Scarsi	UCLA TRIO/IPEM Jason Cong Ashok Jagannathan Yan Zhang	University of California, Irvine IMPACCT Pai H. Chou Jinfeng Liu Dexin Li	University of Wisconsin-Madison SINO/SPR: RLC net synthesis Lei He Kevin Lepak James D. Z. Ma	Carnegie Mellon University SirSim Randal E. Bryant Clayton McDonald	Seoul National University Low-power Software Design Naehyuck Chang Yongsoo Joo Yongseok Choi
3-4	NCSU Distributed Networked Design Franc Brglez Hemang Lavana	Univ. of Wisconsin-Madison Fast Circuit Simulator Charlie Chung-Ping Chen Tsung-Hao Chen Yu-Min Lee	University of Technology RWTH Aachen Flexible Datapath Generator Tobias G. Noll Volker S. Gierenz Oliver Weiss	University of Tokyo Circuit Transformation Masahiro Fujita Masao Kubo	Carnegie Mellon University TrailBlazer Rob A. Rutenbar Prakash Gopalakrishnan	Princeton Univ. Chaff SAT Solver Sharad Malik Matthew Moskewicz Lintao Zhang
4-5	Politechnic Institute of Turin - Italy HW/SW Design reyneri@polito.it Francesco Cucinotta Alessandro Serra	Chalmers University of Technology (Gothenburg, Sweden) Lava HDL Mary Sheeran Magnus Björk	TIMA -- Grenoble France SOC Communication Hardware Ahmed Jerraya Gabriela Nicolescu Amer Baghdadi	Univeristy of Maryland at Baltimore County 3G SOC Design and Test Dr. Jim Plusquellic Sanat Kamal Bahl	SUNY Binghamton The Feng Shui Physical Design Tools Patrick H. Madden Mehmet Can YILDIZ Ryon M. Smey	Seoul Nat'l Univ. Emulation-based Verification Kiyoung Choi Jong-Eun Lee Youngchul Cho
5-6	Norwegian University of Science and Technology STOREQ CAD tool Einar J. Aas Per Gunnar Kjeldsberg	Technical University of Munich WiCkeD 3 Helmut E. Graeb Michael Pronath	University of California, Irvine Component Based Design Framework Rajesh Gupta Frederic Doucet Masato Otsuka	University of California, Irvine EXPRESSION Prof. Nikil Dutt S. Ashok Halambi Peter Grun	Pontificia Bolivariana (UPB) Video acquisition chip Andres Upegui Alejandra Gallón Juan Carlos Velez	UC Berkeley Ptolemy II Edward Lee Stephen Neuendorffer

Wednesday June 20th

Time	Station1 Sun Solaris	Station2 Sun Solaris	Station3 Sun Solaris	Station4 Pentium Win NT Linux	Station5 Pentium Win NT Linux	Station6 Pentium Win NT Linux
10-11	Darmstadt University of Technology Java-based Design Manfred Glesner Leandro Soares Indrusiak Alberto Garcia Ortiz	University of California, San Diego Mixed-Signal Test Professor Alex Orailoglu Sule Ozev	University of California, Los Angeles Strategically Programmable System Majid Sarrafzadeh Seda Ogrenci Memik Soheil Ghiasi	Federal University of S. Catarina Advanced Compact MOSFET model Carlos Galup Montoro Rafael Matos Coitinho Luis Henrique Spiller	UCLA Dragon Majid Sarrafzadeh Xiaojian Yang Ryan Kastner	Carnegie Mellon University TrailBlazer Rob A. Rutenbar Prakash Gopalakrishnan
11-12	UCLA PLAmap and RASP_SYN, Technology Mapping Packages Jason Cong Micahel (Gang) Chen Deming Chen	Universidad Nacional de Ingenieria Fast Prototyping Rodolfo Moreno Luis Enrique Cordova Sosa Daniel Arturo Bejarano	National Tsing Hua University Internet-based simulation Youn-Long Lin Hung-Ping, Wen	University of Michigan Satisfiability Solver Prof. Karem A. Sakallah Fadi Aloul Maher Mneimneh	University of Maryland at Baltimore County Delay Faults Detection Jim Plusquellic Chintan Patel	Univeristy of Maryland at Baltimore County 3G SOC Design and Test Dr. Jim Plusquellic Sanat Kamal Bahl
12-1	Politecnico di Torino RTL power estimation Enrico Macii Riccardo Scarsi	University of Wisconsin-Madison WebHenry Professor Lei He Joe Basile Jun Chen	NCSU Distributed Networked Design Franc Brglez Hemang Lavana	University of Southern California Apollo: Adaptive Power Optimization Massoud Pedram Jian-Lin Liang Dantu Karthik	University of California, Irvine EXPRESSION Prof. Nikil Dutt S. Ashok Halambi Peter Grun	UC Berkeley Ptolemy II Edward Lee Stephen Neuendorffer
1-2	UFRGS-Universidade Federal do Rio Grande do Sul Path Search Ricardo Reis Renato Hentschke Sandro Sawicki	University of Wisconsin - Madison Lsim/p: power simulation Lei He Fei Li Weiping Liao	Technical University of Munich WiCkeD 3 Helmut E. Graeb Michael Pronath	University of Wisconsin-Madison SINO/SPR: RLC net synthesis Lei He Kevin Lepak James D. Z. Ma	SUNY Binghamton The Feng Shui Physical Design Tools Patrick H. Madden Mehmet Can YILDIZ Ryon M. Smey
2-3	Politechnic Institute of Turin - Italy HW/SW Design reyneri@polito.it Francesco Cucinotta Alessandro Serra	UCLA TRIO/IPEM Jason Cong Ashok Jagannathan Yan Zhang	University of California, Irvine IMPACCT Pai H. Chou Jinfeng Liu Dexin Li	University of Pittsburgh Chatoyant modeling system Steven P. Levitan Timothy P. Kurzweg Jose A. Martinez	University of California, Irvine SPARK: High-Level Synthesis Rajesh K. Gupta Nicolae Savoiu Sumit Gupta
3-4	Norwegian University of Science and Technology STOREQ CAD tool Einar J. Aas Per Gunnar Kjeldsberg	Univ. of Wisconsin-Madison Fast Circuit Simulator Charlie Chung-Ping Chen Tsung-Hao Chen Yu-Min Lee	University of Technology RWTH Aachen Flexible Datapath Generator Tobias G. Noll Volker S. Gierenz Oliver Weiss	University of Tokyo Circuit Transformation Masahiro Fujita Masao Kubo	Pontificia Bolivariana (UPB) Video acquisition chip Andres Upegui Alejandra Gallón Juan Carlos Velez
4-5	Universitaet Hannover, Germany Programmable Parallel Multimedia-DSP Prof. Peter Pirsch Willm Hinrichs -	Chalmers University of Technology (Gothenburg, Sweden) Lava HDL Mary Sheeran Magnus Björk	TIMA -- Grenoble France SOC Communication Hardware Ahmed Jerraya Gabriela Nicolescu Amer Gaghdadi	Carnegie Mellon University SirSim Randal E. Bryant Clayton McDonald	Seoul Nat'l Univ. Emulation-based Verification Kiyoung Choi Jong-Eun Lee Youngchul Cho	Seoul National University Low-power Software Design Naehyuck Chang Yongsoo Joo Yongseok Choi
5-6	University of Michigan Two Dimensional Position Detection Khalil Najafi Gijoon Nam Hanseup Kim	KULeuven RF Mixer Circuits Georges Gielen Peter Vancorenland	University of California, Irvine Component Based Design Framework Rajesh Gupta Frederic Doucet Masato Otsuka	University of Michigan Wavelet-based video compression Richard B. Brown Li Ding Yi Li	Princeton Univ. Chaff SAT Solver Sharad Malik Matthew Moskewicz Lintao Zhang