===============================================================================
 SIGDA -- The Resource for EDA Professionals     http://www.sigda.org

 This newsletter is a free service for current SIGDA members
 and is added automatically with a new SIGDA membership.
 Circulation: 2,700
===============================================================================

   15 November 2007       ACM/SIGDA E-NEWSLETTER       Vol. 37, No. 21

   Online archive: http://www.sigda.org/newsletter

===============================================================================

Contents of this E-NEWSLETTER:

(1) SIGDA News
      Contributing author: Matthew Guthaus 
      Contributing author: Lin Yuan 
      Contributing author: Qing Wu 

(2) What are high-K and low-K dielectrics?
      Author: Jerzy Ruzyllo, Penn State University

(3) Paper Submission Deadlines
      From: Hai Zhou 

(4) Upcoming Symposia, Conferences and Workshops
      From: Hai Zhou 

(5) Upcoming Funding Opportunities
      From: Qinru Qiu 

(6) ACM/SIGDA Outstanding New Faculty Award
      From: Martin D.F. Wong 

===============================================================================

Dear ACM/SIGDA members,

  In this issue, we have included the " What are high-K and low-K
dielectrics?" column by Jerzy Ruzyllo at the Penn State University. In
addition, "SIGDA News" column contains a number of fresh headlines. We have
also updated the contents of other regular columns.

  As always, we welcome your comments and suggestions. If you would like to
participate or contribute to the content of the E-Newsletter, please feel free
to contact any of us.

Qing Wu, E-Newsletter Editor;
Matthew Guthaus, E-Newsletter Associate Editor;
Marc Riedel, E-Newsletter Associate Editor;
Qinru Qiu, E-Newsletter Associate Editor;
Lin Yuan, E-Newsletter Associate Editor;
Hai Zhou, E-Newsletter Associate Editor;

===============================================================================

SIGDA News
-----------------------

"Source Code Release For The FGR Global Router"
http://vlsicad.eecs.umich.edu/BK/FGR/
FGR - the global router that took 1st place in the two-dimensional category of
the ISPD 2007 contest is now available in source code and binaries for
academic use. Technical details were described in an an ICCAD 2007 paper
(presented last Wednesday afternoon), but the Web page gives most recent
results, which improve upon the ISPD 2007 contest for every benchmark, and
sometimes by as much as 30%. Commercial licenses will be available upon
request.

"CMOS Running Out of Gas, New Effort Looks for Scalable Replacement, ICCAD
Keynoter Says"
http://www.edn.com/article/CA6498322.html?industryid=47037
The CMOS FET, the main fabric and process used for the production of most
semiconductors today, will run out of gas by the year 2020, so multiple
research projects -- directed by the Semiconductor Research Corporation's
(SRC) Nanoelectronics Research Initiative -- are diligently looking for new
materials and semiconductor fabrics to allow semiconductor scaling to continue
well into the second half of the century.

"Google takes wraps off mobile ambitions "
http://www.eetimes.com/news/latest/showArticle.jhtml?articleID=202802513
Google Inc. has finally taken the wraps off its long rumored ambitions in the
mobile phone space, announcing a wide ranging alliance with 33 companies that
includes handset makers, chip suppliers and carriers to create low cost phones
based on the Linux open source OS.

"Intel Formally Debuts 45-nm Penryn Processors"
http://www.edn.com/article/CA6499824.html
Intel Corp. released on Sunday formal details on the long-awaited server and
high-end PC .Penryn. processors using for the first time what Intel Corp.
co-founder Gordon Moore calls one of the biggest transistor advancements in 40
years. The "Penry" processors use the company.s hafnium-based high-k metal
gate (Hi-k) formula, which is meant to decrease electricity leaks as Intel
noted. In addition to aiming to increase computer performance and saving
energy use, the 16 new processors are lead-free, RoHS-compliant and will be
halogen-free next year. These advancements combined with new processor
features allow Intel to design products that are two-thirds the size of
previous versions and thus more cost-effective, as well as the ability next
year to pursue new ultra mobile and consumer electronics SoC opportunities,
the company claimed. 

"The Mathworks Adds Support For Parallel Apps, Multithreaded Computations, 
64-bit Platforms"
http://www.edn.com/article/CA6499807.html
Aimed at helping engineers and scientists model increasingly complex systems
in less time by allowing development of parallel applications independently of
the resources that are available for execution, Natick, Mass.-based technical
computing and model-based design software provider The MathWorks today
announced four enhancements in its MATLAB and Distributed Computing Toolbox
products meant to allow increased performance and large data set handling. In
addition to the supports for multithreaded computation for multicore systems
and 64-bit Solaris platforms, the MATLAB Distributing Computing Toolbox now
offers capabilities to develop applications that interleave parallel and
serial code and interactively prototyping parallel algorithms on a desktop
computer by running four local MATLAB sessions. With MATLAB and Distributed
Computing Toolbox, engineers can prototype parallel applications on multicore
desktop computers using up to four processors and four MATLAB sessions. For
more computing power, these applications can scale to a computer cluster
without code change by utilizing the MATLAB Distributed Computing Engine. The
applications can also include serial code that is executed in the desktop
machine, the company noted.

"Qualcomm Moves 3G Chips to 45-nm Process"
http://www.edn.com/article/CA6501135.html
Qualcomm Inc. Tuesday announced that it has made the first phone call on a 3G
chip manufactured with 45-nm process technology. Qualcomm's call was made on
the 45-nm chips received from Taiwan Semiconductor Manufacturing Co.  (TSMC),
the world's largest dedicated semiconductor foundry. Qualcomm did not state
the technical details of the 45-nm chips in its release. However, industry
sources report three new 45-nm single-chip solutions targeted for mass-market
smartphones that include integrated solutions on dual core technology,
multi-band RF transceiver, ARM11 apps processor, Bluetooth 2.1 EDR, FM radio,
GPS and a 5 Mpixel camera. Sources report the chipsets support UMTS or EV-DO
Rev B, with full backward compatibility and GPS functionality, and that
sampling isn't expected until Q4 2008, with ramp likely to follow in 2009.

"IBM Selects Virtutech's Simulator for Power Architecture"
http://www.eetimes.com/news/design/showArticle.jhtml?articleID=203100336
Virtutech, Inc announced that its SimicsTM product has been selected by IBM to
create advanced, system-level simulation models for IBM's next-generation
embedded processor cores, beginning with the PowerPC 464FP core. As part of a
broader strategic roadmap designed to support its Power ArchitectureTM
ecosystem, IBM will be able to leverage the virtualized development
environment provided by Simics to enable software development ahead of silicon
availability, offering quality, productivity and time-to-market advantages for
IBM customers. 

"Nanoscale Chip Verification: A Massively Analog Problem?"
http://eetimes.com/news/design/showArticle.jhtml?articleID=202802481
As semiconductor manufacturing technology deals increasingly with finer and
finer measurements, verification of nanoscale components presents a problem of
scale, requiring a scaling of verification technology commensurate with the
shrinking of technologies like CMOS.

"Insights Using NAND Flash in Portable Designs"
http://eetimes.com/news/design/showArticle.jhtml?articleID=202803935
As the raging success of Apple's iPod still rings in our ears, NAND flash
memory is seen as the rising star of solid-state memory for portable and
consumer applications.

"Deciphering the Disk Drive Conundrum"
http://eetimes.com/news/design/showArticle.jhtml?articleID=202802913
Issues of privacy, information security and identity theft are concerns for
all organizations, big and small. Individuals and corporations alike find
themselves increasingly vulnerable to the destruction and corruption of
sensitive data, including transaction records, banking details, password
files, digital photos and even video clips.

"Agfa to Work on Plastic Memory With Thinfilm"
http://eetimes.com/news/design/showArticle.jhtml?articleID=202805707
Printed electronics technology developer Thin Film Electronics ASA has signed
up film and camera company Agfa-Gevaert NV to a joint development agreement
for the production of printed organic memories.

"Needed: A New Design-to-Fab Flow For Advanced ICs"
http://eetimes.com/news/design/showArticle.jhtml?articleID=202805759
As the increasing precision of hardware geometries pushes the limits of
visible-light lithography, manufacturers' reliance on DRC and DFM checks can
make the difference between manufacturable and nonmanufacturable designs.

"India Is Most Wireless-Focused Design Location, Says Synopsys"
http://eetimes.com/news/design/showArticle.jhtml?articleID=202805760
For all of those that thought Europe was the hotbed of wireless IC design EDA
company Synopsys has some evidence that my force a change of mind.

"Asics Added To MEMS Wafers"
http://www.eetimes.com/news/semi/showArticle.jhtml?articleID=202801147
Microelectromechanical system (MEMS) chips are currently joined to separate
CMOS ASICs after separate wafers are diced. A new technique called
"chip-on-MEMS" bonds ASIC dice atop an entire MEMS wafer before dicing,
according to developer VTI Technologies Oy. 

"Under The Hood: Hot 3G Phone Owes Debt To Analog"
http://www.eetimes.com/news/semi/showArticle.jhtml?articleID=202800251
Nokia's hot little number in 3G phones these days is the N95. Sitting
somewhere at the top of the lineup, the N95 gets anointed in Nokia's marketing
as a "multimedia computer," but in one view, it's the still the analog IC that
sets it apart.

"Nanoscale Chip Verification: A Massively Analog Problem?"
http://www.eetimes.com/news/semi/showArticle.jhtml?articleID=202802481
A while back, I moderated a panel entitled "The End of Traditional CMOS." This
excellent discussion arrived at a somewhat optimistic conclusion: The rumors
of the death of CMOS have been greatly exaggerated. The truth is, "simple"
CMOS scaling has not been simple for a long time. Though it is getting harder,
we have been dealing with new processes, materials, devices and circuits for
decades, and we will continue to find appropriate process "enhancements." The
trajectory of current manufacturing technology can reasonably be expected to
get us to about 20 nm. 

"Optical Signals Interact With MEMS"
http://www.eetimes.com/news/semi/showArticle.jhtml?articleID=202802607
Micro- and nanoscale mechanical structures have long been used to sculpt and
channel optical signals, from waveguides to resonators, but lately the
direction of influence has reversed.  Now optical signals are being used to
manipulate these mechanical structures.  Recently, researchers at both the
Massachusetts Institute of Technology (Cambridge) and Cornell University
(Ithaca, N.Y.) demonstrated new methods of using optical signals to control
mechanical structures, at least one group of material scientists proposing to
close the feedback loop. 

"True Design-For-Manufacturability Critical To 65-Nm Design Success"
http://www.eetimes.com/news/semi/showArticle.jhtml?articleID=202803596
True design for manufacturability (DFM) at 65-nm and below technology nodes
has become more critical due to the shrinking of the critical dimensions of
structures on the chip where the same absolute physical variations can result
in relatively large electrical variations. 

"Software Specialist Fogclear Focuses Post-Silicon"
http://www.eetimes.com/news/semi/showArticle.jhtml?articleID=202804270
First silicon, the initial prototype of a new chip design, often involves days
of tedious, labor-intensive debugging and mask repairs before production-ready
chips can be produced. Most problems with initial prototypes can be diagnosed,
but repairing problems deep inside a chip becomes increasingly difficult as
design rules shrink and mask levels are added.  Some have proposed adding
extra tunable structures to affect repairs post-silicon. 

"Gartner Warns of 2008 Semi Industry Downturn"
http://www.edn.com/article/CA6501055.html?industryid=47037
Gartner has warned that a downturn could be coming in 2008 for the
semiconductor industry.  In a Gartner newsletter dated November 12, the firm
noted government economists and financial counselors are now warning that the
United States could experience a recession due to sub-prime mortgage debt and
the U.S.-initiated, and now global, "credit crunch".

"SIA: Global Chip Sales to Grow at 7.7% CAGR to Reach $321B in 2010"
http://www.edn.com/article/CA6501170.html?industryid=47037
During the Semiconductor Industry Association's (SIA) webcast this morning,
hosted by EDN sister publication Semiconductor International, of the industry
group's annual forecast of global semiconductor sales, the SIA is projecting
that sales of chips will exceed $321 billion in 2010, growing at a compound
annual growth rate (CAGR) of 7.7 percent between 2007 and 2010.

"SEMI: Silicon wafer Shipments Flatten in Q3"
http://www.edn.com/article/CA6498395.html?industryid=47037
In line with historic patterns, the pace of wafer area shipments slowed
slightly in Q3, with silicon wafer area shipments totaling 2.2 billion square
inches, up approximately 5 percent year-over-year from 2.1 billion square
inches and essentially flat sequentially, the Silicon Manufacturers Group
(SMG) of industry consortium SEMI reported late Tuesday.

"'Tactile Interface' Could Aid Blind Computer Users"
http://www.chipdesignmag.com/display.php?articleId=1759&issueId=
A Johns Hopkins researcher has joined experts from four other institutions who
plan to create a dynamic electronic surface to allow blind or visually
impaired people to "feel" mathematical graphs, diagrams and other visuals now
displayed on computer screens.

"World's Fastest Vector Supercomputer"
http://www.chipdesignmag.com/display.php?articleId=1724&issueId=
NEC Corporation today announced the worldwide launch and availability of its
SX series model SX-9, the world's fastest vector supercomputer with a peak
processing performance of 839 TFLOPS. The SX-9 features the world.s first CPU
capable of a peak vector performance of 102.4 GFLOPS per single core.

"IBM BlueGene is the World's Fastest Computer Once Again"
http://www.eetimes.com/news/latest/showArticle.jhtml;jsessionid=L1ZFJMYSSWTWYQSNDLSCKHA?articleID=202805721
The BlueGene/L System, jointly developed by IBM and the U.S. Department of
Energy, remains the world's fastest supercomputer, topping the latest biannual
list that saw five new entrants into the top 10.  The BlueGene/L System has
held the No. 1 spot since November 2004. The latest list of top 500 computers
was released Monday at SC07, the international conference on high-performance
computing in Reno, Nev. 


==============================================================================

What are high-K and low-K dielectrics?
---------------------------------------
Author: Jerzy Ruzyllo, Penn State University

Semiconductor Notes, Note No 1, posted April 15, 2003
(http://www.semiconductornotes.com/notes/ViewFile.asp?Which=30)
 
The dielectric constant, k, is a parameter defining ability of material to
store charge. Consequently, it also defines capacitance, C, of any capacitor
comprising of a layer of dielectric sandwiched between two metal plates. In the
figure below size of the upper plate defines area of the capacitor contact (A).

All other parameters equal, k would determine capacitance of the above
structure, or in other words, it would define the extent of capacitive coupling
between two conducting plates . with .high.-k dielectric such coupling would be
strong, and with .low.-k dielectric being obviously weak. In Si technology the
reference is a value of k of silicon dioxide, SiO2, which is 3.9. Dielectrics
featuring k>3.9 are referred to as .high.-k dielectric while dielectric
featuring k<3.9 are defined as .low.-k dielectrics. 

In cutting edge silicon nanoelectronics both high- and low-k dielectrics are
needed to implement fully functional very high-density integrated circuit,
although, for drastically different reasons. High-k dielectrics are needed in
MOS gate stacks to maintain sufficiently high capacitance of the metal
(gate)-dielectric-Si structure in MOS/CMOS transistors (Fig. 2). Due to the
continued scaling of the channel length (L), and hence reduced gate area A, the
need to maintain sufficient capacitance of the MOS gate stack was met by
gradual decrease of the thickness of SiO2 gate oxide (see Eq.1).  Obviously
such scaling cannot continue indefinitely as at certain point gate oxide will
become so thin (thinner than about 1 nm) that, due to excessive tunneling
current, it would stop playing role of an insulator. Hence, dielectric
featuring k higher than 3.9, i.e. one assuring same capacitive coupling but at
the larger physical thickness of the film, must be used instead of SiO2 as a
gate dielectric in advanced MOS/CMOS integrated circuits.

On the opposite end of the spectrum finds itself a multi-layer metallization
scheme in which inter-layerdielectric(ILD) is used to electrically insulate
metal lines. In this case it is of critical importance that the capacitive
coupling between adjacent interconnect lines (Fig. 3) is as limited as
possible. Hence, a low-k dielectric must be used to assure as little capacitive
coupling (low .cross-talk.) between interconnect lines as possible.

Whether the problem is with high-k dielectrics for MOS gates or low-k
dielectrics for ILDs, lack of viable technical solutions in either of these
areas will bring any future progress in mainstream silicon technology to a
halt.


==============================================================================

Paper Submission Deadlines:
----------------------------

DAC'08 - Design Automation Conference (sponsored by SIGDA)
Anaheim, CA
Jun 9-13, 2008
Deadline: Nov 19, 2007
http://www.dac.com/

NOCS'08 - Int'l Symposium on Networks-on-Chips
Newcastle, UK
Apr 7-11, 2008
Deadline: Nov 19, 2007
http://async.org.uk/nocs2008/

TAU'08 - Int'l Workshop on Timing Issues in the Specification
and Synthesis of Digital Systems (Sponsored by SIGDA)
Monterey, CA
Feb 25-26, 2008
Deadline: Nov 26, 2007
http://www.tauworkshop.com/

GLSVLSI'08 - Great Lakes Symposium on VLSI (Sponsored by SIGDA)
Orlando, FL
May 4-6, 2008
Deadline: Nov 30, 2007
http://www.glsvlsi.org/

ICAC'08 - Int'l Conference on Autonomic Computing
Chicago, IL
Jun 2-6, 2008
Deadline: Dec 1, 2007
http://www.acis.ufl.edu/~icac2008/

ISVLSI'08 - Annual Symposium on VLSI
Montpellier, France
Apr 7-9, 2008
Deadline: Dec 5, 2007
http://www.lirmm.fr/isvlsi2008/

SLIP'08 - Int'l Workshop on System Level Interconnect Prediction
Newcastle, UK
Apr 5-6, 2008
Deadline: Dec 7, 2007
http://www.sliponline.org/

EWME'08 - European Workshop on Microelectronics Education
Budapest, Hungary
May 28-30, 2008
Deadline: Dec 10, 2007
http://www.eet.bme.hu/new/index.php?option=com_content&task=view&id=129&Itemid=160

RCE'08 - Reconfigurable Computing Education
Montpellier, France
Apr 10, 2008
Deadline: Dec 15, 2007
http://helios.informatik.uni-kl.de/RCeducation08/

RFID'08 - Conference on RFID
Las Vegas, NV
Apr 16-17, 2008
Deadline: Dec 19, 2007
http://www.ieee-rfid.org/

ACSD'08 - Int'l Conference on Application of Concurrency to System Design (sponsored by SIGDA)
Xi.an, China
June 23-27, 2008
Deadline: Jan 4, 2008
http://ictt.xidian.edu.cn/acsd2008/Pages/ACSD_main.jsp

MEMOCODE'08 - Int'l Conference on Formal Methods and Models for Codesign (sponsored by SIGDA)
Anaheim, CA
Jun 5-7, 2008
Deadline: Feb 1, 2008
http://svl1.cs.pdx.edu/memocode08/


==============================================================================

Upcoming Symposia, Conferences and Workshops:
---------------------------------------------

PDCS'07 - Int'l Conference on Parallel and Distributed Computing Systems
Cambridge, MA
Nov 19-21, 2007
http://www.iasted.org/conferences/home-590.html

ICST'07 - Int'l Conference on Sensing Technology
Palmerston North, New Zealand
Nov 26-28, 2007
http://icst.massey.ac.nz/

BIOCAS'07 - Biomedical Circuits and Systems Conference
London, UK
Nov 27-30, 2007
http://biocas.grm.polymtl.ca/

MICRO'07 - Int'l Symposium on Microarchitecture
Chicago, IL
Dec 1-5, 2007
http://www.microarch.org/micro40/

IP-SOC'07 - IP Based SoC Design
Grenoble, France
Dec 5-6, 2007
http://www.us.design-reuse.com/ipsoc2006/

ICPADS'07 - Int'l Conference on Parallel and Distributed Systems
Hsinchu, Taiwan
Dec 5-7, 2007
http://www.ccrc.nthu.edu.tw/icpads2007/

ICFPT'07 - Int'l Conference on Field-Programmable Technology
Kitakyushu, Japan
Dec 12-14, 2007
http://www.kameyama.ecei.tohoku.ac.jp/icfpt07/

EUC'07 - Int'l Conference on Embedded and Ubiquitous Computing
Taipei, Taiwan
Dec 17-20, 2007
http://www.cs.ccu.edu.tw/~shiwulo/euc07/

HiPC'07 - Int'l Conference on High Performance Computing
Goa, India
Dec 18-21, 2007
http://www.hipc.org/

ICM'07 - Int'l Conference on Microelectronics
Cairo, Egypt
Dec 29-31, 2007
http://www.ieee-icm.com/

VLSI'08 - Int'l Conference on VLSI Design (sponsored by SIGDA)
ES'08 - Int'l Conference on Embedded Systems
Hyderabad, India
Jan 4-8, 2008
http://vlsiconference.com/vlsi2008/

ASP-DAC'08 - Asia and South Pacific Design Automation Conference
(sponsored by SIGDA)
Seoul, Korea
Jan 21-24, 2008
http://www.aspdac.com/aspdac2008/

HiPEAC'08: Int'l Conference on High Performance Embedded Architectures &
Compilers
Goteborg, Sweden
Jan 27-29, 2008
http://www.hipeac.net/hipeac2008/

ISSCC'08 - Int'l Solid-State Circuits Conference
San Francisco, CA
Feb 3-7, 2008
http://isscc.org/isscc/

LATW'08 - Latin-American Test Workshop
Puebla, Mexico
Feb 17-20, 2008
http://www-elec.inaoep.mx/latw2008/

FPGA'08 Int'l Symposium on Field-Programmable Gate Arrays (sponsored by SIGDA)
Monterey, California
February 24-26, 2008
http://www.isfpga.org

DATE'08 - Design Automation and Test in Europe (sponsored by SIGDA)
Munich, Germany
Mar 10-14, 2008
http://www.date-conference.com/

ISQED'08 - Int'l Symposium on Quality Electronic Design
San Jose, CA
Mar 17-19, 2008
http://www.isqed.org/

SPL'08 - Southern Conference on Programmable Logic
Bariloche-Patagonia, Argentina
Mar 26-28, 2008
http://www.splconf.org/

ASYNC'08: Int'l Symposium on Asynchronous Circuits and Systems
Newcastle, UK
Apr 7-11, 2008
http://async.org.uk/async2008/

ISPD'08 - Int'l Symposium on Physical Design (sponsored by SIGDA)
Portland, OR
Apr 13-16, 2008
http://www.ispd.cc/

RAW'08 - Reconfigurable Architectures Workshop
Miami, FL
Apr 14-15, 2008
http://www.ece.lsu.edu/vaidy/raw/

ISCAS'08 - Int'l Symposium on Circuits and Systems
Seattle, WA
May 18-21, 2008
http://iscas2008.org/


==============================================================================

Upcoming Funding Opportunities
------------------------------------

James S. McDonnell Foundation

Studying Complex Systems - 21st Century Science Collaborative Activity
Deadline: continuous
http://www.jsmf.org/programs/cs/


ETS

Postdoctoral Fellowship Award Program
Deadline: February 1, 2008
http://www.ets.org/portal/site/ets/menuitem.1488512ecfd5b8849a77b13bc3921509/?vgnextoid=a7d6d635e06ed010VgnVCM10000022f95190RCRD&vgnextchannel=0d03d635e06ed010VgnVCM10000022f95190RCRD

 
DOE

Broadening Participation and Collaborat
Deadline: September 30, 2008
http://www.science.doe.gov/grants/FAPN08-01.html


ANS

Student Grant
Deadline: Continuous. The committee reviews and votes on the requests at its
June and November meetings.
http://rrsd.ans.org/grants.html


IBM

IBM Herman Goldstine Fellowship
Deadline: January 5, 2008
http://domino.research.ibm.com/comm/research_projects.nsf/pages/goldstine.index.html


Postgraduate Opportunities

Postgraduate Research Participation at the Air Force Research Laboratory,
Materials Directorate, Tyndall Air Force Base
Deadline: Continuous
http://www.orau.gov/orise/edu/USAF/gi-pdRLMD.htm

Oak Ridge National Laboratory Advanced Short-Term Research Opportunity
Deadline: Continuous
http://www.orau.gov/orise/edu/ornl/gi-rgpdASTRO.htm


Faculty Opportunities

Faculty Research Participation at the U.S. Army Research Laboratory
Deadline: Continuous
http://see.orau.org/ProgramDescription.aspx?Program=10084


American Association of University Women

International Fellowships
Deadline: December 1, 2007
http://www.aauw.org/fga/fellowships_grants/international.cfm


ASEE

Naval Research Laboratory (NRL) Postdoctoral Fellowship Program 
Deadline: Continuous. Applications are accepted on an ongoing basis.
http://www.asee.org/resources/fellowships/nrl/index.cfm

AAWU

International Fellowships
Deadline: December 1, 2007
http://www.aauw.org/fga/fellowships_grants/international.cfm


NIH

NLM Knowledge Management & Applied Informatics Grants
Deadline: May 25, 2007
          September 25, 2007
          January 25, 2008
http://grants1.nih.gov/grants/guide/pa-files/PAR-07-236.html


NASA

Broad Agency Announcement (BAA) - N61339-06-R-0107 (Joint ADL Co-Laboratory)
Deadline: Continuous
http://nawctsd.navair.navy.mil/EBusiness/BusOps/Acquisitions/Index.cfm?client=STRICOM

Applied Information Systems Research - NNH07ZDA001N-AISR
Deadline: To be announced (TBA)
http://nspires.nasaprs.com/external/solicitations/summary.do?method=init&solId=%7B89FBF877-DD5F-AC6E-DAB3-AE19504EA70D%7D&path=open


DOD

Modeling and Simulation for Information Systems Research
Deadline:   FY 09 should be submitted by June 1, 2008
            FY 10 should be submitted by June 1, 2009
http://fedbizopps.cos.com/cgi-bin/getRec?id=20061030a9

TRADOC FOC-03-06: Situational Understanding
Deadline: Continuous until August 26, 2009
https://abop.monmouth.army.mil/baas.nsf/1f6c118700adf19d85256d3d0051f9a2/31926e7d7d4b2e9285256f6d0056ce06?OpenDocument

Military Networking Technology for Global Information Exchange (GIE)
Deadline: Continuous until September, 2008
http://fedbizopps.cos.com/cgi-bin/getRec?id=20040909a11

Microsystems Technology Office-Wide BAA
Deadline: January 14, 2008
http://www.fbo.gov/spg/ODA/DARPA/CMO/BAA07%2D18/SynopsisP.html

ASEE-NRL Postdoctoral Fellowship Program
Deadline: Continuous
http://hroffice.nrl.navy.mil/jobs/postdoc.htm

Cognitive Technology Threat Warning System (CT2WS)
Deadline: April 11, 2008
http://fedbizopps.cos.com/cgi-bin/getRec?id=20070412a1

Warrior Systems Technologies - Body-Worn Systems, Hand Held Devices, and
Smart-Lightweight Electronic Components/Modules for Soldier Protection,
Knowledge Management and Cognitive Improvement
Deadline: Continuous. (April 1, 2007 ~ March 31, 2009)
https://www3.natick.army.mil/ssbaa.htm

Homeland Security (2.2.1) - N61339-02-R-0071
Deadline: Continuous. This BAA expires on January 30, 2008
http://www1.fbo.gov/spg/DON/NAVAIR/N61339/N61339-02-R-0071/Attachments.html

Microsystems Technology Office-Wide 
Deadline: January 14, 2009
http://www.fbo.gov/spg/ODA/DARPA/CMO/BAA07-18/Attachments.html

SPINS in Semiconductors
Deadline: December 31, 2008
http://fundingopps.cos.com/alerts/57993

Artificial Intelligence Technologies
Deadline: December 31, 2008
http://heron.nrl.navy.mil/contracts/baa.htm

Quantum Information Science and Technology
Deadline: December 31, 2008
http://heron.nrl.navy.mil/contracts/0708baa/baa.htm

Young Investigator Program (YIP)
January 12, 2008
http://www.onr.navy.mil/sci_tech/3t/corporate/yip.asp

High Density Optical Memory
Deadline: Continuous
http://www.afosr.af.mil/pdfs/afosr_baa_2007_1.pdf

Quantum Electronic Solids
Deadline: Continuous
http://www.afosr.af.mil/pdfs/afosr_baa_2007_1.pdf

Distributed Intelligence
Deadline: Continuous
http://www.afosr.af.mil/pdfs/afosr_baa_2007_1.pdf

Enabling Technologies for Modeling and Simulation (BAA-03-12-IFKA)
Deadline: September 30, 2008
http://www.fbo.gov/spg/USAF/AFMC/AFRLRRS/BAA-03-12-IFKA/Modification%2005.html

Joint National Training Capability Broad Agency Announcement
Deadline: May 14, 2009
http://www.ntsc.navy.mil/Ebusiness/BusOps/Acquisitions/Index.cfm?RND=220990

BAA for Simulation and Training Technology R&D
Deadline: Continuous until December 31, 2010
http://www.ntsc.navy.mil/EBusiness/BusOps/Acquisitions/Index.cfm?RND=868451

Army Research Office (ARO) Broad Agency Announcement for Basic and Applied
Scientific Research (W911NF-07-R-0003)
Deadline: Continuous through September 30, 2011
http://www.arl.army.mil/www/default.cfm?Action=6&Page=8

 
NSF

Scientific Computing Research Environments for the Mathematical Sciences 
(SCREMS) - NSF 07-502
Deadline: January 24, 2008
http://www.nsf.gov/pubs/2007/nsf07502/nsf07502.htm

Cyber-Enabled Discovery and Innovation   (CDI)
Deadline:   October 30, 2007 - November 30, 2007
        August 30, 2008 - September 30, 2008
            August 30 - September 30, Annually Thereafter

High Performance Computing Acquisition: Towards a Petascale Computing 
Environment for Science and Engineering - NSF 05-625
Deadline: November 30, 2007
          November 28, 2008
http://www.nsf.gov/pubs/2005/nsf05625/nsf05625.htm

Computer Systems Research (CSR) - NSF 07-504
Deadline: January 17, 2007
http://www.nsf.gov/pubs/2007/nsf07504/nsf07504.htm


Cyber Trust - NSF 07-500
Deadline: November 14, 2007
http://www.nsf.gov/pubs/2007/nsf07500/nsf07500.htm

Foundations of Computing Processes and Artifacts (CPA) - NSF 07-587
Deadline: December 7, 2007
http://www.nsf.gov/pubs/2007/nsf07587/nsf07587.htm

Broadening Participation Research Initiation Grants in Engineering (BRIGE) - NSF 07-589
Deadline: February 8, 2008
http://www.nsf.gov/pubs/2007/nsf07589/nsf07589.htm

Expeditions in Computing
Deadline: Letter of Intent Due Date(s) (required): 
      November 05, 2007
      July 10, 2008
      July 10, Annually Thereafter
          Preliminary Proposal Due Date(s) (required): 
          December 30, 2007
          September 10, 2008
          September 10, Annually Thereafter
http://www.nsf.gov/pubs/2007/nsf07592/nsf07592.htm

Software for Real-World Systems (SRS) - NSF 07-599
Deadline: January 17, 2008
http://www.nsf.gov/pubs/2007/nsf07599/nsf07599.htm


Information and Intelligent Systems: Advancing Human-Centered Computing, Information Integration and Informatics, and Robust Intelligence - NSF 07-577
Deadline: November 19, 2007 for Large Projects
          December 10, 2007 for Small Projects
http://www.nsf.gov/pubs/2007/nsf07577/nsf07577.htm

Strategic Technologies for Cyberinfrastructure (STCI)
Deadline :    February 14, 2008
http://www.nsf.gov/funding/pgm_summ.jsp?pims_id=500066&org=NSF&sel_org=NSF&from=fund

Engineering Design (ED)
Deadline :   February 15, 2008
http://www.nsf.gov/funding/pgm_summ.jsp?pims_id=13340


==============================================================================

ACM/SIGDA Outstanding New Faculty Award
-----------------------------------------

****** New Submission Deadline: December 1, 2007 ******* 

I am pleased to inform you that the application deadline for the annual 
ACM/SIGDA Outstanding New Faculty Award (ONFA) has been extended to 
*Dec. 1*, 2007. This is a great opportunity for new faculty members in the 
field of EDA (electronic design automation) or CAD (computer-aided design). 
For details of this award, please see attached description. 

Please send your application to mdfwong@uiuc.edu and cc to genzel@uiuc.edu 
(preferably in a single PDF file). 

If you have already applied but didn't get any acknowledgment from us, 
please re-send your application. 

The ACM/SIGDA Outstanding New Faculty Award recognizes a junior faculty 
member early in her or his academic career who demonstrates outstanding 
potential as an educator and/or researcher in the field of electronic design a
utomation. While prior research and/or teaching accomplishments are important, 
the selection committee will especially consider the impact that the candidate 
has had on her or his department and on the EDA field during the initial years 
of their academic appointment. The award is presented annually at Design 
Automation Conference. (See http://www.sigda.org/onfa.html for details.) 


==============================================================================
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Last revised by I. Markov - 05/21/06
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