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10th Annual ACM/SIGDA Ph.D. Forum at DAC

Tuesday, June 5th, 2007
Sails Pavilion, San Diego Convention Center
San Diego, CA


Sponsored by

SIGDA

DAC

Supported by

Intel

IBM Research

NEC Research.

STMicroelectronics

Synopsys

Cadence

Altera

Xilinx

TPC Chair
Tony Givargis
  UCI, USA

TPC Co-Chair
Jin Yang
  Intel, USA

Publicity Chair
Eli Bozorgzadeh
  UCI, USA

Finance Chair
Jin Yang
  Intel, USA

Past Chair
Frank Liu
  IBM, USA

SIGDA Liaison
Robert B. Jones
   Intel, USA

Program Committee

Cristinel Ababei
  Magma, USA

Fadi Aloul
  Amer. Univ. Sharjah, UAE

Iris Bahar
  Brown Univ., USA

Twan Basten
  Eindhoven Univ. Tech., The Netherlands

Eli Bozorgzadeh
  UCI, USA

Krish Chakrabarty
  Duke Univ., USA

Samarjit Chakraborty
  Natl. Univ., Singapore

Naehyuck Chang
  Seoul Natl. Univ., Korea

Deming Chen

  UIUC, USA

Vivek Chickermane
  Cadence, USA

Philip Chong
  Cadence, USA

Pasquale Cocchini
  Intel, USA

Katherine Compton
  Univ. Wisconsin, USA

Adam Donlin
  Xilinx, USA

Peter Feldmann
  IBM, USA

Ian Harris
  UC Irvine, USA

Jiang Hu
  Texas A&M Univ., USA

Mike Hutton
  Altera, USA

Alex Jones

  Univ. of Pittsburgh, USA

Prabhakar Kudva
  IBM, USA

Marcello Lajolo  

  NEC labs , USA

Guy Lemieux
  Univ. British Columbia, Canada

Peng Li
  Texas A&M Univ., USA

Frank Liu
  IBM, USA

Roman Lysecky

  Univ. of Arizona, USA

Ion Mandoiu
  Univ. Connecticut, USA

Seda Memik

  Northwestern University, USA

Subhasish Mitra
  Stanford Univ., USA

Kartik Mohanram
  Rice Univ., USA

Gi-Joon Nam
  IBM, USA

Michael Niemier
  Georgia Tech., USA

Davide Pandini
  ST Micro, Italy

Carl Pixley
  Synopsys, USA

Donatella Sciuto
  Politechnico di Milano, Italy

Youngsoo Shin
  KAIST, Korea

Chao Wang

  NEC Labs, USA  

Jianping (Jane) Xu
   Intel Corp

 

Sister Forums

SIGDA CADathlon

Archive of Past Forums

2006 2005 2004 2003 2002

2001 2000 1999 1998

The Ph.D. Forum at the Design Automation Conference is a poster session hosted by SIGDA for Ph.D. students to present and discuss their dissertation research with people in the EDA community. It is one of the premier forums for Ph.D. students in design automation to get feedback on their research and for industry to see academic work in progress. 400+ people attended each of the last two forums.

Participation in the forum is competitive, with an acceptance rate around 30%. Some funds will be available for travel assistance this year. Allocation of travel funds will be based on the quality of the submissions and by financial need.

The forum is open to all members of the design automation community and is free-of-charge. It is co-located with DAC for the convenience of the large DAC audience, but DAC registration is not required to attend this event.

Students planning to graduate within 1-2 years or who will have completed their dissertation during the 2006-2007 academic are eligible. Students who have participated in previous Forums are not eligible.

The 2007 SIGDA PhD Forum at DAC will be held between 6:30-8:00pm on Tuesday, June 5th, 2007 at the Sails Pavilion, San Diego Convention Center.


Accepted Submissions

 

Track 1: System-level Synthesis and Optimization (including network-on-chip, system software issues)

 

Energy Efficient Reliability Schemes for Hard Real-Time Systems

 

Tongquan Wei, Michigan Technological University (US)

Computation of the Minimum Data Storage and Applications in the Memory Management for Multi-Dimensional Signal Processing Systems

 

Hongwei Zhu, University of Illinois at Chicago (US)

Power-aware Gaming on Portable Devices

 

Yan Gu, National University of Singapore (Singapore)

Communication Synthesis for Networks-on-Chip (NoC)

 

Praveen Bhojwani, Texas A&M University (US)

A Platform-based Design Flow for Enabling Automated Mapping on Heterogeneous Multiprocessor Embedded Systems

 

Abhijit Davare, UC Berkeley (US)

Analysis and Optimization of Fast and Accurate SoC Platform Models

 

Gunar Schirner, UC Irvine (US)

Cross-layer Approach for Integrated Power Management

 

Nevine AbouGhazaleh, University of Pittsburgh (US)

Regularly Structured Circuit Design Methodology

 

Zhenyu Qi, University of Virginia (US)

 

Instruction and Data Cache Timing Analysis in Fixed-Priority Preemptive Real-Time Systems

 

Jan Staschulat, Technical University Braunschweig (Germany)

Track 2: FPGA and Reconfigurable Systems

Tackling Emerging Reliability Issues in FPGAs

 

Suresh Srinivasan,  Penn State University (US)

An Architectural Approach for Reducing Power and Increasing Security of RFID Tags

 

Shenchih Tung, University of Pittsburgh (US)

Concepts for Self-adaptive Reconfigurable Networks

 

Thilo Streichert, University Erlangen-Nuremberg (Germany)

 

A Micro-Power Hardware Fabric for Embedded Computing

 

Gayatri Mehta, University of Pittsburgh (US)

An Architecture Framework for an Adaptive Extensible Processor

 

Hamid Noori, Kyushu University (Japan)

Track 3: Physical Design

 

Track 4: Verification, Testing, and Failure Analysis

 

A TLM Design for Verification Methodology

 

Nicola Bombieri,University of Verona (Italy)

Track 5: CAD Emerging Technologies


Contact Information

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Last modified: May 10, 2007