Structural Macromodeling for Beyond-the-die Integration of High Performance Mixed-mode Systems

Hao Yu

SIGDA Ph.D. Forum at DAC 2006 (Ph.D. Forum 2006)
San Francisco, CA, July 2006

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Abstract

System in a Package (SiP) is cost-effective to integrate digital, analog/RF and MEMS components within one package. SiP contains heterogeneous components with strong interference in one package. This calls for a robust chip and package co-design considering the electromagnetic compatibility and environmental uncertainty.

We present a structured and parameterized macro-modeling. It considers the heterogeneous model structures including sparsity and hierarchy (TBS), handles massive magnetic coupling (VPEC/VNA), and generates parameterized sensitivity for physical synthesis (SP-MACRO). Compared to existing macromodels, our method is 100X faster to build and simulate. In addition, it is applicable to physical synthesis of high-speed clock network, chip-package co-designed power delivery system, and thermal-aware layout planning.

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