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Sponsored by
SIGDA
DAC
Supported by
Intel
IBM Research
Mentor Graphics
Synopsys
Xilinx
Eve
TPC Chair
Alex Jones University of Pittsburgh, USA
TPC Co-Chair
Gi-Joon Nam IBM Research, USA
Publicity Chair
Gayatri Mehta University of North Texas, USA
Finance Chair
Gi-Joon Nam IBM Research, USA
Past Chair
Eli Bozorgzadeh
UC Irvine, USA
SIGDA Liaison
Alex Jones
University of Pittsburgh, USA
Program Committee
Cristinel Ababei Magma, USA
Fadi Aloul Amer. Univ. Sharjah UAE
Peter Athanas Virginia Tech, USA
Iris Bahar Brown Univ., USA
Samarjit Chakraborty Natl. Univ., Singapore
Naehyuck Chang Seoul Natl. Univ., Korea
Deming Chen UIUC, USA
Philip Chong Cadence, USA
Azadeh Davoodi Univ. of Wisconsin, USA
Adam Donlin Xilinx, USA
Peter Feldmann IBM, USA
Ian Harris UC Irvine, USA
Jiang Hu Texas A&M Univ., USA
Alex Jones Univ. of Pittsburgh, USA
Prabhakar Kudva IBM, USA
Roman Lysecky Univ. of Arixona, USA
Gayatri Mehta Univ. of North Texas, USA
Seda Memik Northwestern University, USA
Prabhat Mishra Univ. of Florida, USA
Subhasish Mitra Standford Univ., USA
Kartik Mohanram Rice Univ., USA
Gi-Joon Nam IBM, USA
Davide Pandini ST Micro, Italy
Sudeep Pasricha Colorado State Univ., USA
Carl Pixley Synopsys, USA
Michael Niemier Georgia Tech., USA
Donatella Sciuto Politechnico di Milano, Italy
Gunar Schirner Northeastern Univ., USA
Youngsoo Shin KAIST, Korea
Mohammad Tehranipoor Univ. of Connecticut, USA
Chao Wang NEC Labs, USA
Jianping (Jane) Xu Intel Corp., USA
Zhuo Li IBM Research, USA
Sister Forums
SIGDA CADathlon
Archive of Past Forums
2009
2008
2007
2006
2005
2004
2003
2002
2001
2000
1999
1998
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Call for Participation
The Ph.D. Forum at the Design
Automation Conference is a poster session hosted by SIGDA for Ph.D. students to
to present an discuss their dissertation research with people
in the EDA community. It has become one of the premier forums
for Ph.D students in design automation to get feedback on their
research and for industry to see academic work in progress: 400 -
500 people attended the last forums. Participation in the forum
is competitive. In 2009, about 27 submissions out of 90 were
accepted. Limited funds will be available for travel assistance,
based on the financial need. The forum is open to all members of
the design automation community and is free-of-charge. It is
co-locacted with DAC to attract the large DAC audience, but DAC
registration is not required in order to attend this event.
The 2010 SIGDA PhD Forum at DAC will be held
between 6:00-7:30pm
on
Wednesday, June 16th, 2010
in room 204AB of the Anaheim Convention Center, Anaheim, CA.
Helpful links:
Accepted Submissions
- Approximate logic circuits: Theory and applications
Mihir Choudhury, Rice University, USA
- Yield Enhancement through Pre- and Post-Silicon Adaptation
Cheng Zhuo, University of Michigan at Ann Arbor, USA
- Methods and Algorithms for Scalable Verification of Asynchronous Designs
Haiqiong Yao, University of South Florida, USA
- Instruction Cache Exploration and Optimization for Embedded Systems
Yun Liang, National University of Singapore, Singapore
- Energy Efficient Transactional Memory For Embedded Architectures
Cesare Ferri, Brown University, USA
- Efficient SMT Solving for Hardware Model Checking
Hyondeuk Kim, University of Colorado at Boulder, USA
- Timing Analysis of Model-driven Embedded Software
Lei Ju, National University of Singapore, Singapore
- Architecture and Physical Design for Advanced Networks-on-Chip
Wooyoung Jang, University of Texas at Austin, USA
- Robust Prediction and Optimization of Circuit Performance under Process Variations
Jin Sun, The University of Arizona, USA
- Low-Cost Quality Assurance Techniques for High-Performance Mixed-Signal/RF Circuits and Systems
Hsiu-Ming Chang, University of California Santa Barbara, USA
- Cost-effective Lifetime and Yield Optimization for NoC-based MPSoCs
Brett Meyer, Carnegie Mellon University, USA
- Workload Modeling and Characterization in Multicore Design
Paul Bogdan, Carnegie Mellon University, USA
- Design Methodologies for Improving Embedded Systems with Hardware Accelerators
Christian Pilato, Politecnico di Milano, Italy
- Robust FPGA Design Under Variations
Akhilesh Kumar, University of Waterloo, Canada
- Reducing Circuit Soft Error Rate (SER): From Combinational to Sequential Circuits
Kai-Chiang Wu, Carnegie Mellon University, USA
- A Formula-Driven Approach for Compiling and Optimizing Hardware Implementations of DSP Transforms
Peter Milder, Carnegie Mellon University, USA
- Fault and yield aware on-chip memory design and management
Hyunjin Lee, University of Pittsburgh, USA
- A Malleable Hardware Accelerator for Energy-Efficient Adaptive Processor
Somnath Paul, Case Western Reserve University, USA
- Energy-Aware Memory Allocation Framework for Embedded Data-Intensive Signal Processing Applications
Ilie Luican, University of Illinois at Chicago, USA
- Power Delivery Design and Optimization in 3D Integrated Circuits
Nauman Khan, Tufts University, USA
- Application mapping onto coarse-grained reconfigurable architecture
Ganghee Lee, Seoul National University, Korea
- Cost and Reliability Modeling of Spare-Enhanced Multi-Core Processors
Saeed Shamshiri, University of California Santa Barbara, USA
- Order Reduction of Parameterized Structured EM-based Linear Models
Jorge Fernandez Villena, INESC ID / IST - T.U. Lisbon, Portugal
- Efficient Approaches For Functional Validation of SOC Designs Using High-Level Specifications
Mingsong Chen, University of Florida, USA
- Architecting Systems for using Emerging Interconnect Technologies
Soumya Eachempati, Pennsylvania State University, USA
- Physically-Aware N-Detect Test: Generation and Evaluation
Yen-Tzu Lin, Carnegie Mellon University, USA
- Ultra Low-Power and Robust Digital Signal Processing Algorithm and Hardware for Implantable Neural Interface Microsystems
Seetharam Narasimhan, Case Western Reserve University, USA
- Reliability Enhancement against Soft Errors in SRAM-based Programmable Systems
Shahin Golshan, University of California Irvine, USA
Contact Information
For questions not addressed on this page, please send e-mail to:
gayatri.mehta@unt.edu. Please include "DAC Ph.D Forum" in the subject line of your email.
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Last modified June 3, 2010
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