ABSTRACT
A simulator named "TLSIM" is described in this paper. TLSIM simulates GaAs circuits considering the interconnects as transmission lines. The simulator provides a simplistic way of updating signals at circuit nodes. The simulation method is applicable to general graph topologies for interconnects. The behavior of signal flow at transmission line junctions and at the active circuit interfaces is captured by the application of Kirchoff's current equations. Coupling among conductors and loss in transmission lines are discussed. Results on run time and accuracy are presented for GaAs direct coupled FET logic (DCFL) circuits.
In high-speed integrated circuits (IC), such as in GaAs IC, interconnects have to be treated as transmission lines. As a result, simulation of integrated circuits becomes complicated. The complications arise from (i) the nonlinear active devices connected to the interconnects, (ii) physical junctions of interconnects used for a net (signal or power and ground), (iii) coupling among neighboring interconnects, and (iv) losses in interconnects.
SPICE3C1 (an enhanced version of SPICE2G6) can handle GaAs devices. The transmission line model used in SPICE is lossless and computationally extensive. Schemes have been developed to simulate coupled lossless transmission lines in SPICE [5], [7]. However, these schemes are not efficient for large circuits.
Several methods exist to solve coupled lossy transmission lines with arbitrary nonlinear terminations. A method based on convolving terminal voltages with network Green's function (obtained from a frequency domain analysis) has been incorporated in a simulator called UATRAN [4]. A method entirely in the time domain has been developed and implemented in iSIMLE by Gao et. al. [2]. Run times for these methods are prohibitively large for integrated circuits of practical size.
TLSIM provides a simple scheme of updating signal values at circuit nodes and interconnect junctions at discrete time intervals. This scheme uses the forward and backward travelling waves to monitor voltages or currents at desired nodes. In a complex network of interconnects, travelling waves are better named "waves coming into" a node and the "waves going out" of a node. In this scheme, an IC will be divided by the interconnects into disjoint subcircuits. A subcircuit and a junction of transmission lines are treated in a similar fashion so far as computing these incoming and outgoing signals are concerned. The signals coming into a node (a subcircuit or a junction of transmission lines) at a given time are computed from signals going out of the adjacent nodes at some previous times. In computing outgoing signals from the incoming signals, the time-invariant scattering matrices are used for a transmission line junction. For a subcircuit, nonlinear simultaneous equations replace the scattering matrix. However, both of these techniques are based on Kirchoff's current equations. Simplicity of this scheme gives rise to computational efficiency.
TLSIM can handle coupled lines without loss. As in [2], loss can be considered if the coupling is limited to immediate neighboring lines only. However, loss computation according to [2] requires large computation time. Loss is neglected in this initial implementation of TLSIM. Transmission line parameters are assumed to be frequency independent.
The models for GaAs devices and the associated capacitances are taken from [6]. SPICE3C1 from UC Berkeley also uses the same models.
The simulation technique for lossless uncoupled lines is presented in section 2. This section describes how the signals are computed at the junctions of transmission lines and at the nodes connected to the logic circuits. An adaptation of this simulation technique to the case of lossless coupled lines is presented in section 3. Issues of computational complexity and accuracy related to the lossy lines are presented in section 4. Run time results and speed vs. accuracy tradeoffs for TLSIM are presented in section 5. Page 747
For the frequency range of operation under consideration,
a quasi-TEM analysis of an IC interconnect is valid
[3].
Under the quasi-TEM assumption for a uniform
transmission line, the voltage V and the current I at any
point x on a transmission line at time t is described by the
telegrapher equations:
[Equation (2)] where R, G, L and C are, respectively, the per unit length series resistance, shunt conductance, inductance and capacitance of the transmission line.
Solving equations (1) and (2) as a function of time involves networks connected to the transmission line (called terminal networks). However, the solution to these equations consists of two travelling waves. One of these waves will be coming into a node and the other going out of the node. The voltage signals associated with these waves at a node "p" are denoted by [Unkeyed Text] and [Unkeyed Text] respectively. The total signal at node p is the sum of these two signals.
For a lossless transmission line between nodes "a" and
"b", the following relations hold:
[Equation (4)] where [delta] is the propagation delay in the transmission line. These equations provide a convenient way to compute the incoming signal at a given time from the outgoing signal at a previous time. Consider a junction of more than one transmission lines (found in signal nets and more commonly found in power and clock nets). For example, m conductors meet at point p in fig. 1. The outgoing signals at this point can be obtained from the incoming signals using the concept of scattering matrix [8].
The conductor with end nodes "k" and "p" is denoted
by the index "k." The voltage wave on conductor k at point
p travelling toward the node k is denoted by [Unkeyed Text] while
the voltage wave incident at node p on conductor k is denoted
by [Unkeyed Text]. Similar quantities can be defined on the
other conductors. Then the relation among the signals coming
into the node p and going out of the same node is
given by
[Equation (5)]
where the vector [Unkeyed Text] and [Unkeyed Text] represent, respectively, the
components [Unkeyed Text] and [Unkeyed Text] (k = 1,2, .. m) and S is a scattering
matrix given by
[Equation (6)] Sjk (j [Unkeyed Text] k) represents the fraction of [Unkeyed Text] transmitted to conductor j and Skk represents the fraction of [Unkeyed Text] reflected back on conductor k. Notice that if [Unkeyed Text] = 0 for all j [Unkeyed Text] k (which is true if all conductors except conductor k are infinitely long or if the impedances are matched), then [Unkeyed Text] = Skk[Unkeyed Text] and [Unkeyed Text] = Sjk[Unkeyed Text]. The elements of S can be computed from the characteristic impedances (Zk's) of the conductors. In computing Skk and Sjk, all conductors except the conductor k will be replaced by a load ZLk which is the parallel combination of the impedances of the conductors being replaced.
[Equation (7)]
is then simply the reflection coefficient and
[Equation (8)] is the transmission coefficient at the load ZLk.
Fig. 1. A junction point p where m conductors meet.
Observe that the signals [Unkeyed Text] are coming to the node p from the nodes adjacent to p. Thus these signals are originating at some previous times. Starting from the initial conditions at t = 0, a given network is simulated at discrete times. At any given time, the signals at all nodes are computed. Therefore, the already computed and stored signals [Unkeyed Text] are used to compute the signals [Unkeyed Text] from equations (5). The signals [Unkeyed Text] are going out from node p at the present time and these same signals will be treated as signals coming in to the adjacent nodes at appropriate future times. Also observe that, at any given time, the nodes in a circuit can be processed in any order. There will be a scattering Page 748 matrix associated with each junction of transmission lines. These scattering matrices are invariant in time.
The above method of computing signals on transmission lines does not depend on the topology of the interconnects. Thus the method is applicable to any topology including the ring topologies used for power and ground nets.
The concept of time-invariant scattering matrix does not hold at junctions of transmission lines and subcircuits containing nonlinear devices. However, scattering matrix can be shown to be equivalent to Kirchoff's current equations. Thus solving the basic Kirchoff's current equations at each node will give the same result while it will be general enough to handle arbitrary terminal networks. For nonlinear networks, the Kirchoff's current equations will be nonlinear. Therefore, in general, a numerical method is needed to solve the system of nonlinear equations.
Consider the DCFL nand gate in Fig. 2 driving a
transmission line with characteristic impedance Zc and
propagation delay [delta]. Let f1, f2 and f3 be the drain to source
currents as a function of terminal voltages for transistors
T1, T2 and T3 respectively. The Kirchoff's current equation
at the output node x is given by,
[Equation]
Since Vx(t) = [Unkeyed Text](t) + [Unkeyed Text](t) and [Unkeyed Text](t) = [Unkeyed Text](t - [delta]) we
have,
[Equation (9)]
Kirchoff's current equation at internal node y is given by
f2(Vx, V1, Vy) - f3(Vy, V2, Vss) =0. (10)
Fig. 2. A nand gate driving a transmission line.
Equations (9) and (10) can be solved simultaneously for Vx(t) and Vy(t) assuming [Unkeyed Text](t - [delta]) has been computed previously and stored. With Vx(t) computed, [Unkeyed Text](t) can be computed and stored for computing voltage Vz at some future time using similar equations at node z.
In equations (9) and (10) Vdd and Vss are assumed known. This assumption is not necessary. Power and ground lines can also be regarded as transmission lines and Vdd and Vss signals at the gate can be treated as unknowns. The additional Kirchoff's equations at the Vdd and Vss nodes provide sufficient number of equations for computing all four unknowns for this example gate. Considering power and ground lines as transmission lines is important to compute power up transients and to explore the interaction between power-line noise and signal noise.
The capacitances associated with active devices give rise to differential equations. These equations are transformed to algebraic equations by implicit Euler's method, thus giving a system of nonlinear algebraic equations. The nonlinear equations are solved by a Newton-Raphson iterative scheme.
For a system of coupled interconnects, the telegrapher equations (1) and (2) are still valid except that the scalar trassmission line parameters R, G, L and C are to be replaced by the matrices R, R, L and C associated with the coupled system. Similarly, the scalr variables V and I are to be replaced by vectors V and I. Given the geometries of the microstrip lines and the dielectric constants of the medium, the impedance matrices can be computed by programs such as CAP2D [9].
For coupled transmission lines, some transformation
is usually applied to decouple the system. A method of
modal analysis in the time domain by Djordjevic et al.
[1]
has been adopted in TLSIM for coupled lossless lines. For
a system of n coupled lines, V and I are n × 1 vectors and
R, G, L and C are n × n matrices. Combining (1) and (2)
with R=G=0, gives
Let Sv be the eigenvector matrix corresponding to the
eigenvalues of the matrix LC. Let
V (x,t) = Sv g(x,t) (12)
Here [g(x,t)]T = [g1(x,t), g2(x,t) ... , gn(x,t)]. The element
gm (m = 1,n) represents the mth component of vector
g(x,t) and is called the intensity function of the mth
eigenmode. Then from (11),
The matrix [Unkeyed Text]LCSv is diagonal, thus the n partial
differential equations given by (13) are decoupled and each
of them has a solution of the form of a single uncoupled
transmission line. In particular, for the mth eigenmode
[Equation (15)] Page 749 where cm is the velocity of propagation for the mth eigenmode. It can be shown that [Unkeyed Text] is an eigenvalue of LC. The actual conductor voltages can be obtained from the modal intensities using equation (12).
The concept of scattering matrix can be extended to
junctions of coupled lines. In this case the scattering matrix
S relating Vout to Vin at a junction for coupled lines
consists of submatrices Sjk's. The submatrices Sjk's are
computed using relations similar to (7) and (8) except that
the quantities involved are matrices. For example,
Skk = (ZLK + Zk)-1 (ZLk + Zk) (16)
where ZK is the characteristic impedance matrix for kth
coupled system and the matrix ZLK is to be computed in a
manner similar to that of uncoupled case.
The scattering matrix relating gout to gin in all the
lines coming to a junction is given by
S' = M-1 S M (17)
where M is a block-diagonal matrix composed of the matrices
Sv's for the sets of coupled lines forming the junction.
For a single lossy line of length [Unkeyed Text] between nodes "a"
and "b," the signal coming in at node "b" from node "a" is
[Equation (18)]
where [Unkeyed Text],
[Unkeyed Text], [Unkeyed Text],
[Unkeyed Text], [Unkeyed Text] and I1(z) is the modified
Bessel function of the first kind
[2].
The first term in (18)
corresponds to the attenuated wavefront arriving from the
other end at instant t, while the second term represents the
trailing effects from the voltage waves whose wavefronts
arrived at node "b" previously. Similar equation can be
written for the signal coming into node "a."
Computing the second term in the above equation demands extensive run time and storage capacity. In order to be computationally feasible for a large number of interconnects, simpler models are needed.
TLSIM ignores the effect of loss on transmission lines. Fig. 3 shows the voltage at the load end for a matched line excited with a step function. The top curve in this Fig. shows the voltage at the load under lossless condition. Other three curves (from top to bottom) correspond to three values of R: 50[omega]/cm 100[omega]/cm and 200[omega]/cm respectively (G is assumed to be zero for simplicity). The effect of loss is small for small R and short interconnects.
The method of decoupling coupled lines as presented in section 4 is not applicable, in general, in the presence of loss. This is because the transmformation matrix used to diagonalize the LC matrix, in general, transforms the diagonal R and G matrices to nondiagonal matrices. Thus the resulting system becomes coupled again. However, if coupling is considered among neighboring conductors only, then there exists a transformation matrix which does not change the diagonal nature of R and G matrices [2]. In that case the above technique for loss computation can be applied [2].
Fig. 3. Loss of accuracy as a function of R and transmission-line length.
Some results of investigations with direct coupled GaAs FET logic (DCFL) circuits and transmission lines are now presented.
During initial power up of logic circuits, there may exist considerable amount of transients in the power supply voltage and currents. As an example, Fig. 4 shows the power up transient in the power supply line of a DCFL inverter chain. The values used for Vdd and VSS are 1.6 V and 0 V respectively. Each transmission line between two adjacent inverters is assumed to be 0.1 mm long.
Fig. 4. The power up transients at the far end of the power transmission line. Page 750
The time required for simulating circuits for a given time period with TLSIM is inversely proportional to the time step used in the simulation. Larger time steps may give shorter simulation times at the expense of accuracy. This inaccuracy stems from two sources: (a) the implicit Euler method used for solving differential equations is more accurate with smaller step size and (b) the delay [delta] in a transmission line, in general, is not an integral multiple of the time step. The values for outgoing voltage waves at transmission line terminals are stored only for each time step. Linear interpolation of voltage wave from two consecutive samples is used in TLSIM. Fig. 5 shows the output waveform for a circuit for three different choices of step size. With decreasing step size, the improvement in accuracy becomes insignificant. Table 1 shows the variation of run times with step size for an inverter pair.
Fig. 5. Simulation accuracy vs. step size.
TABLE 1: STEP SIZE VS. RUN TIME FOR TLSIM.
Since the transmission line is modeled as delay blocks, it provides a natural way of partitioning circuits into smaller subcircuits. Due to the uncoupled nature of signals at nodes in separate subcircuits, it is possible to simulate the subcircuits separately at each time step. The computational complexity for solving the unknown node voltages of the circuit is thus reduced from O(n[alpha]) to [Unkeyed Text], where n is the number of unknown node voltages in the complete circuit and mi is the number of unknown node voltages in the ith partition and [alpha] is the order according to which the run time increases. Depending on the numerical method used, [alpha] lies in the range 2 to 3. Short transmission lines can be introduced in large circuits without any transmission lines to reduce run time.
Fig. 6. Run time as a function of the number of transmission lines partitioning a circuit into subcircuits.
Run times per time step (on an IBM System 6000 model 530 machine) for simulating a 16 bit ripple carry adder with varying number of transmission lines are shown in Fig. 6. The carry adder is implemented out of GaAs DCFL nand gates. Initially, the 16 bit adder was simulated without any transmission line. Next, a transmission line is used to divide the adder into two 8 bit units. This method of partitioning is continued until 15 transmission lines are used to divide the circuit into 16 subcircuits, each subcircuit containing a single bit adder. Fig. 6 shows how run time is reduced as a result of introducing more and more transmission lines. A carry is propagated though the carry chain. The propagation of the carry starts at zero time at the primary input. The carry out at the 16th bit position is shown in Fig. 7 for two extreme cases: when no transmission line is used (solid curve) and when 15 transmission lines are used (dashed curve). The later output is a delayed version of the former output. The delay is due to the transmission lines. This delay can be seen to be negligibly small compared to the signal propagation of 1.4 ns through the carry chain.
Run time depends on the number of lines in a coupled system. Fig. 8 shows run time for simulating 16 pairs of inverters for 0.5 ns with a step size of 1 ps. Each inverter pair is connected by a transmission line. The sixteen transmission lines are divided into coupled groups, each group containing n transmission lines. Run time is shown as a function of n. Fig. 9. shows the signal on a transmission line for a window in time for n=1 (solid line), 2 and 4. The signals for n=2 and 4 are found to be almost identical. Page 751
Fig. 7. Carry out at the 16th bit position in the presence (solid curve) and in the absence (dashed curve) of transmission lines.
Fig. 8. Run time as a function of the number of coupled lines in a group.
Fig. 9. Effect of coupling on signal waveform.
A method for simulating transmission line effects in high speed circuits and interconnects is presented. The method allows coupling among lossless interconnects. In this method, transmission lines provide a natural way of partitioning a large circuit into smaller subcircuits. Thus transmission line analysis helps reducing the run time rather than increase it. More work needs to be done to handle loss and obtain efficient way of simulating coupled lines. Use of variable time steps and event driven simulation also need to be investigated.
[1] A. R. Djordjevic, T. K.Sarkar and R. F.Harrington, "Time-Domain Response of Multiconductor Transmission Lines," Proceedings of the IEEE, vol. 75, No. 6, Jun. 1987, pp. 743-764.
[2] D. S. Gao, A. T. Yang and S. M. Kang, "Modeling and Simulation of Interconnection Delays and Crosstalks in High-Speed Integrated Circuits," IEEE Transactions on Circuits and Systems, vol. 37, No. 1, Jan. 1990, pp. 1-9.
[3] K. C. Gupta, R. Garg and I. J. Bahl, Microstrip Lines and Slotlines, Artech House Inc., Massachusetts, 1979.
[4] J. C. Liao, O. A. Palusinski and J. L. Prince, "Computation of Transients in Lossy VLSI Packaging Interconnections," IEEE Transactions on Components, Hybrids and Manufacturing Tech., vol. 13, No. 4, Dec. 1990, pp. 833-838.
[5] F. Romeo and M. Santomauro, "Time-Domain Simulation of n Coupled Transmission lines," IEEE Transactions on Microwave Theory and Tech., vol. 35, No. 2, Feb. 1987, pp. 131-136.
[6] H. Statz, P. Newman, I. W. Smith, R. A. Paucel, H. A Haus, "GaAs FET Device and Circuit Simulation in SPICE," IEEE Transactions on Electron Devices, vol. ED34, No.2, Feb. 1987, pp. 160-169.
[7] V. K. Tripathi and J. B. Retig, "A SPICE Model for Multiple Coupled Microstrip and other Transmission lines," 1985 IEEE MTT-S Digest, 1985, pp. 703-706.
[8] E.A. Wolf and R. Kaul, Microwave Engineering and System Applications, John Wiley and Sons, 1978.
[9] C. P. Yuan, "Modeling and Extraction of Interconnect Parameters in Very-large-scale Integrated Circuits," Ph.D. dissertation , Univ. of Illinois at Urbana-Champaign, Aug. 1983.
* This work was supported by the National Science Foundation under grant MIP-9003434.